Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758186AbcJQH6u (ORCPT ); Mon, 17 Oct 2016 03:58:50 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:50930 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758169AbcJQH6e (ORCPT ); Mon, 17 Oct 2016 03:58:34 -0400 X-AuditID: cbfec7f1-f79f46d0000008eb-f0-580484a56f97 Subject: Re: [PATCH] leds: leds-pca963x: workaround group blink scaling issue To: Matt Ranostay , Tony Lindgren Cc: "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , Matt Ranostay , Rob Herring , Mark Rutland From: Jacek Anaszewski Message-id: <5d9476b8-b552-f745-e06d-9894fa2e542a@samsung.com> Date: Mon, 17 Oct 2016 09:58:26 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-version: 1.0 In-reply-to: Content-type: text/plain; charset=utf-8; format=flowed Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKKsWRmVeSWpSXmKPExsWy7djPc7pLW1giDNZuULaYf+Qcq8XlXXPY LJZev8hk8fFbP7PF15PH2Cxa9x5ht9h/xcuB3WPNvDWMHt++TmLx2DnrLrvHplWdbB4HHzaz e3zeJBfAFsVlk5Kak1mWWqRvl8CV8WDqDKaC73wVH9bdY2tgbOTpYuTkkBAwkVjZvIkVwhaT uHBvPVsXIxeHkMBSRoljr56yQjifGSV6pvWywnS8njCdCSKxjFHi2/NmFgjnGaPE9p6H7CBV wgL+Ei/fH2UDsUUEPCXOXnvFDlLEDDLq/rdlYEVsAoYSP1+8ZgKxeQXsJL5OmAXWwCKgKrFi wzLGLkYODlGBCIndd1MhSgQlfky+xwJicwoES7yb+wpsDLOAlcSzf62sELa8xOY1b5lBdkkI bGKXOPD6LxvIHAkBWYlNB5ghPnCRWLjpPQuELSzx6vgWdghbRuLy5G4WiN7JjBIXj91khXBW M0ps7OyE6rCWaPj/iwViG5/EpG3TmSEW8Ep0tAlBmB4S3afrIKodJVZ/Pwn2opDAEWaJ9jap CYzys5C8MwvJC7OQvLCAkXkVo0hqaXFuemqxkV5xYm5xaV66XnJ+7iZGYGI5/e/4xx2M709Y HWIU4GBU4uG9MZ8pQog1say4MvcQowQHs5II7/salggh3pTEyqrUovz4otKc1OJDjNIcLEri vHsWXAkXEkhPLEnNTk0tSC2CyTJxcEo1MFY8fV65wkdcqr7QKsj03pb9Dq0P6+umPZu8abUW w5pZkUqvSzIsLMrTXz5f3NJesyGtJdzPTmVXWOHuNP/oryWHSyPfzJ5u8J3j+smUCX3yG9Ze 3uzAV2+70Mmiaf2mAx/DsuYsjXhnbVem2KmYGdOQLPRMX/dGYyZ/+PtXjhK8Ii8tguOPKrEU ZyQaajEXFScCAInfsMsoAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrGIsWRmVeSWpSXmKPExsVy+t/xy7oNLSwRBntWclrMP3KO1eLyrjls FkuvX2Sy+Pitn9ni68ljbBate4+wW+y/4uXA7rFm3hpGj29fJ7F47Jx1l91j06pONo+DD5vZ PT5vkgtgi3KzyUhNTEktUkjNS85PycxLt1UKDXHTtVBSyEvMTbVVitD1DQlSUihLzCkF8owM 0ICDc4B7sJK+XYJbxoOpM5gKvvNVfFh3j62BsZGni5GTQ0LAROL1hOlMELaYxIV769m6GLk4 hASWMEpsfbuBBSQhJPCMUWJagzGILSzgK9H66yQriC0i4Clx9tordoiGY8wS+/e+YwJxmAU+ M0rsmHWZHaSKTcBQ4ueL12AreAXsJL5OmMUGYrMIqEqs2LCMEcQWFYiQuLXqIyNEjaDEj8n3 wDZzCgRLfHvzEizOLGAm8eXlYVYIW15i85q3zBMYBWYhaZmFpGwWkrIFjMyrGEVSS4tz03OL jfSKE3OLS/PS9ZLzczcxAuNs27GfW3Ywdr0LPsQowMGoxMN7Yz5ThBBrYllxZe4hRgkOZiUR 3vc1LBFCvCmJlVWpRfnxRaU5qcWHGE2BnpjILCWanA9MAXkl8YYmhuaWhkbGFhbmRkZK4rxT P1wJFxJITyxJzU5NLUgtgulj4uCUamA07zkaPWHuoX8T39kEvVQOfRhz62Cb4UZHI49/wlem XxP+bbn22lmO7xJOm2T/Su+MZ6zMD1Wu23ri8/NDcuoPBT5F3vle5hhp1Myu6ZDLEsu9uMXE xPPaX5eL16fGMm8M4ynZNfWm3Iy7vQckHm34f3n5/nKzaxcvZZfdXnDybkXs+nnn5plMU2Ip zkg01GIuKk4EAEwFxfHJAgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20161017075829eucas1p19d08bf29b94c2ca2a0fd40f1ed43db3b X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?UTF-8?B?SmFjZWsgQW5hc3pld3NraRtTUlBPTC1TeXN0ZW0gRlcgIChN?= =?UTF-8?B?Qikb7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?SmFjZWsgQW5hc3pld3NraRtTUlBPTC1TeXN0ZW0gRlcgIChN?= =?UTF-8?B?QikbU2Ftc3VuZyBFbGVjdHJvbmljcxtTZW5pb3IgU29mdHdhcmUgRW5naW5l?= =?UTF-8?B?ZXI=?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjc1MjY=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20161013131622eucas1p2e419c58b25f2c61da22d390f2adfacfd X-RootMTR: 20161013131622eucas1p2e419c58b25f2c61da22d390f2adfacfd References: <1476364572-26849-1-git-send-email-matt@ranostay.consulting> <924a896d-b3f2-5fed-62ba-a731e79e1567@samsung.com> <20161014142047.imm4idfetphlp5od@atomide.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1862 Lines: 49 On 10/15/2016 02:00 PM, Matt Ranostay wrote: > On Fri, Oct 14, 2016 at 7:20 AM, Tony Lindgren wrote: >> * Jacek Anaszewski [161013 23:37]: >>> On 10/13/2016 04:20 PM, Matt Ranostay wrote: >>>> On Thu, Oct 13, 2016 at 4:05 PM, Jacek Anaszewski >>>> wrote: >>>>> Why DT property? Is it somehow dependent on the board configuration? >>>>> How this period-scale value is calculated? Is it inferred empirically? >>>>> >>>> >>>> We empirically discovered and verified this with an logic analyzer on >>>> multiple batches of this part. >>>> Reason for the DT entry is we aren't 100% sure that it is always going >>>> to be the same with different board revs. >>>> >>>> Could be that parts clock acts differently with supply voltage. This >>>> has been calculated by setting it an expected value, and measuring the >>>> actual result with the logic analyzer. >>> >>> I'd like to have DT maintainer's ack for this. >>> >>> Cc Rob and Mark. >> >> How about do this based on the compatible property instead? If there >> are multiple manufacturers for this part and only a certain >> parts have this issue we should have multiple compatible properties. >> > > I could only find that NXP as the manufacturer of that part. It is > possible since the clock is internal to the chipset that the vdd of > 2.5V is doing something undefined. > >> Then if it turns out all of them need this scaling there's no need >> to update the binding. > > Understandable. Since at present we can't guarantee that all produced devices are affected, then we should strive to avoid breaking any existing users of the possible non-affected devices. In view of that the addition of a new "compatible" proposed by Tony seems most reasonable. Still, DT maintainer's opinion is required. -- Best regards, Jacek Anaszewski