Date: Mon, 17 Oct 2016 09:55:10 +0200 (CEST)
From: Thomas Gleixner <tglx@linutronix.de>
To: Borislav Petkov <bp@alien8.de>
cc: Ingo Molnar <mingo@kernel.org>, peterz@infradead.org,
        dave.hansen@intel.com, torvalds@linux-foundation.org,
        piotr.luc@intel.com, luto@kernel.org, brgerst@gmail.com, hpa@zytor.com,
        linux-kernel@vger.kernel.org, dvlasenk@redhat.com, jpoimboe@redhat.com,
        linux-tip-commits@vger.kernel.org
Subject: Re: [tip:x86/urgent] x86/cpufeature: Add AVX512_4VNNIW and AVX512_4FMAPS
 features
In-Reply-To: <20161016142233.xuqrahty6gcwq7en@pd.tnic>
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References: <20161012175731.29619-1-piotr.luc@intel.com> <tip-a518dcc82b6162009c8ca3d169fe61c81536ff17@git.kernel.org> <20161016142233.xuqrahty6gcwq7en@pd.tnic>
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On Sun, 16 Oct 2016, Borislav Petkov wrote:
> > The spec can be found in Intel Software Developer Manual or in
> > Instruction Set Extensions Programming Reference. See
> > https://software.intel.com/sites/default/files/managed/69/78/319433-025.pdf.
> 
> > +/* Intel-defined CPU features, CPUID level 0x00000007:0 (edx), word 18 */
> > +#define X86_FEATURE_AVX512_4VNNIW  (18*32+2) /* AVX-512 Neural Network Instructions */
> > +#define X86_FEATURE_AVX512_4FMAPS  (18*32+3) /* AVX-512 Multiply Accumulation Single precision */
> 
> This is getting ridiculous: we keep adding new leafs to
> ->x86_capability, thus bloating cpuinfo_x86 but then it is not even
> worth it - this patch defines only two bits.

What's worse is that the Instruction Set Extensions Programming Reference
manual says:

CPUID.(EAX=07H, ECX=0):EDX[bit 02] AVX512_4FMAPS
CPUID.(EAX=07H, ECX=0):EBX[bit 03] AVX512_4VNNIW

So AVX512_4VNNIW is in EBX not EDX. What's correct here? The manual or the patch?

I'm going to zap it.

Thanks,

	tglx