Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757613AbcJQH5P (ORCPT ); Mon, 17 Oct 2016 03:57:15 -0400 Received: from mx2.suse.de ([195.135.220.15]:47083 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757896AbcJQHzp (ORCPT ); Mon, 17 Oct 2016 03:55:45 -0400 X-Amavis-Alert: BAD HEADER SECTION, Duplicate header field: "References" From: Jiri Slaby To: stable@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Alexander Graf , Jiri Slaby Subject: [PATCH 3.12 78/84] KVM: PPC: Book3S PR: Emulate TIR register Date: Mon, 17 Oct 2016 09:52:05 +0200 Message-Id: X-Mailer: git-send-email 2.10.1 In-Reply-To: <2d291fde5f706ac081e8cfc0ebe7e31dd534dfe7.1476690493.git.jslaby@suse.cz> References: <2d291fde5f706ac081e8cfc0ebe7e31dd534dfe7.1476690493.git.jslaby@suse.cz> In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 977 Lines: 32 From: Alexander Graf 3.12-stable review patch. If anyone has any objections, please let me know. =============== commit a5948fa092a04dfd6b9ee31c99eb6896c158eb08 upstream. In parallel to the Processor ID Register (PIR) threaded POWER8 also adds a Thread ID Register (TIR). Since PR KVM doesn't emulate more than one thread per core, we can just always expose 0 here. Signed-off-by: Alexander Graf Signed-off-by: Jiri Slaby --- arch/powerpc/kvm/book3s_emulate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c index 57913b199919..cda2cba56915 100644 --- a/arch/powerpc/kvm/book3s_emulate.c +++ b/arch/powerpc/kvm/book3s_emulate.c @@ -570,6 +570,7 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) case SPRN_MMCR0: case SPRN_MMCR1: case SPRN_MMCR2: + case SPRN_TIR: #endif *spr_val = 0; break; -- 2.10.1