Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933464AbcJQJHH (ORCPT ); Mon, 17 Oct 2016 05:07:07 -0400 Received: from mout.kundenserver.de ([212.227.126.130]:64378 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933286AbcJQJG5 (ORCPT ); Mon, 17 Oct 2016 05:06:57 -0400 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: Neil Armstrong , linux-kernel@vger.kernel.org, linux-oxnas@lists.tuxfamily.org Subject: Re: [PATCH 1/2] ARM: oxnas: Add OX820 SMP support Date: Mon, 17 Oct 2016 11:06:20 +0200 Message-ID: <14513531.isB50DxNJf@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-34-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: <20161017084303.20078-2-narmstrong@baylibre.com> References: <20161017084303.20078-1-narmstrong@baylibre.com> <20161017084303.20078-2-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:satFS61XVTNH6rzhe6EUlF9J5TYsZk2JnBVJSAMLpfqycHNwS7u 3Leey6nWJhAXnno3tpBrUd877aiOn4qtpLfUnzr4B9HWD3LC92GAv+wlU4iEvw/wnExhvQV FiU2WxVmdTa68HUNUf7wlDznxDmtevRC9vBaUpo4dGLH+4bB7Rf2DtOoblBDo9ZoKkyKlrh 92z9N6jZfYChqci3xOGug== X-UI-Out-Filterresults: notjunk:1;V01:K0:3TFZYTmGxAg=:emRSCJRwI3eOkchbVIrcqE mZ9GAjbaeSBIveBnaJqUPugKgwCDevgMfBpIlrHp6QeiYU73wrtzWjhwqcITyQCWkV4//bFg5 kCBql1oQqYQ/uV6b2U51KRJadZ403wT+tHXP0hiv6QBg6F9GvKzCt94TnCs2siBKS25L2L4hF CZ6/CKV01jysevw9tlUXfksutwfgV2JS7/+1HzEsRR78tjqx2nXi8pDQ+mLBsa9BtHwJXZQ3x ctFA02SDo0JIu0qFG+PkEYadxXF/Cs8JoTOm6cwKJaxT8LwU212q8lpU3BYeIi3+Er5t+hOBC JYKmuSjzGTc/opsgCv6OoLWYnRiDr1wB+9mgBiyh3laszk3LfXwfBT/mqJm6XQbARIv3Fp71u RBdPkipK+uM9YbQlGdTU0yBqi70TuZB54P0B4GVqCXYL01LgeCXbvPBfAVC5rDAmFgYABrkbN GQBRyzx0TME05t7Vqwa6yMh1Fcex/Dvf1JttcI8KWClt+z+bZ8i9k15Tn8TTZG3MbADKkvY0R EBZ/PUIoodLfHqrcmt1mQC8+J1T1WpE6ThWUaZCp+Q2C/rFUEwetY7s6HaqJYBYHUhEJ9NsR/ qf8Rte+ETbVCDbhcmJcNVup6WL9cSjAf+7JGr8gOrjPZO8oskHp4vRc8QuuBkEwHhwqCdYaKj ERO395XOKDEexqs493/bFZTjyfzRosliUKquJfhha2N4LDtnDkIObrUj0NLOr4u81//KAchbs go43sKETA7Gis1B8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1413 Lines: 42 On Monday, October 17, 2016 10:43:02 AM CEST Neil Armstrong wrote: > + > + /* > + * This is really belt and braces; we hold unintended secondary > + * CPUs in the holding pen until we're ready for them. However, > + * since we haven't sent them a soft interrupt, they shouldn't > + * be there. > + */ > + write_pen_release(cpu); > + > + /* > + * Enable GIC cpu interface in CPU Interface Control Register > + */ > + writel(GIC_CPU_CTRL_ENABLE, > + gic_cpu_ctrl + GIC_NCPU_OFFSET(cpu) + GIC_CPU_CTRL); > + > + /* > + * Send the secondary CPU a soft interrupt, thereby causing > + * the boot monitor to read the system wide flags register, > + * and branch to the address found there. > + */ > + > + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); > + timeout = jiffies + (1 * HZ); > + while (time_before(jiffies, timeout)) { > + smp_rmb(); > + if (read_pen_release() == -1) > + break; > + > + udelay(10); > + } > This seems to have been copied from plat-versatile, but is really not needed here since you apparently have proper hardware support for starting up the CPUs. Any reason you can't just write to the cpu_ctrl register once and keep going without that whole holding_pen loop and spinlock? Arnd