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From: Kevin Hilman <khilman@baylibre.com>
To: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
        Sekhar Nori <nsekhar@ti.com>, Rob Herring <robh+dt@kernel.org>,
        Frank Rowand <frowand.list@gmail.com>,
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        Jyri Sarha <jsarha@ti.com>, Tomi Valkeinen <tomi.valkeinen@ti.com>,
        David Airlie <airlied@linux.ie>,
        Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Subject: Re: [PATCH 1/3] ARM: memory: da8xx-ddrctl: new driver
Organization: BayLibre
References: <1476721850-454-1-git-send-email-bgolaszewski@baylibre.com>
        <1476721850-454-2-git-send-email-bgolaszewski@baylibre.com>
Date: Mon, 17 Oct 2016 09:54:15 -0700
In-Reply-To: <1476721850-454-2-git-send-email-bgolaszewski@baylibre.com>
        (Bartosz Golaszewski's message of "Mon, 17 Oct 2016 18:30:48 +0200")
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Bartosz Golaszewski <bgolaszewski@baylibre.com> writes:

> Create a new driver for the da8xx DDR2/mDDR controller and implement
> support for writing to the Peripheral Bus Burst Priority Register.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>

[...]

> diff --git a/drivers/memory/da8xx-ddrctl.c b/drivers/memory/da8xx-ddrctl.c
> new file mode 100644
> index 0000000..dcd0a61
> --- /dev/null
> +++ b/drivers/memory/da8xx-ddrctl.c
> @@ -0,0 +1,77 @@
> +/*
> + * TI da8xx DDR2/mDDR controller driver
> + *
> + * Copyright (C) 2016 BayLibre SAS
> + *
> + * Author:
> + *   Bartosz Golaszewski <bgolaszewski@baylibre.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +
> +#define DA8XX_DDR_CTL_BASE	0xB0000000

This base addr should be the reg property of the node.

> +#define DA8XX_PBBPR_OFFSET	0x00000020
> +#define DA8XX_PBBPR_REG(p)	((p) + DA8XX_PBBPR_OFFSET)

Kevin