Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936177AbcJQQyL (ORCPT ); Mon, 17 Oct 2016 12:54:11 -0400 Received: from mailapp02.imgtec.com ([217.156.133.132]:63859 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1030306AbcJQQxO (ORCPT ); Mon, 17 Oct 2016 12:53:14 -0400 From: Zubair Lutfullah Kakakhel To: , , , , , , CC: , , , , , , , Subject: [Patch v5 11/12] MIPS: xilfpga: Add DT node for AXI emaclite Date: Mon, 17 Oct 2016 17:52:55 +0100 Message-ID: <1476723176-39891-12-git-send-email-Zubair.Kakakhel@imgtec.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1476723176-39891-1-git-send-email-Zubair.Kakakhel@imgtec.com> References: <1476723176-39891-1-git-send-email-Zubair.Kakakhel@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.154.45] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1430 Lines: 58 The xilfpga platform has a Xilinx AXI emaclite block. Add the DT node to use it. Signed-off-by: Zubair Lutfullah Kakakhel --- V3 -> V4 No change V2 -> V3 No change V1 -> V2 Removed accidental local-mac-address entry --- arch/mips/boot/dts/xilfpga/nexys4ddr.dts | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/mips/boot/dts/xilfpga/nexys4ddr.dts b/arch/mips/boot/dts/xilfpga/nexys4ddr.dts index f5ebab8..09a62f2 100644 --- a/arch/mips/boot/dts/xilfpga/nexys4ddr.dts +++ b/arch/mips/boot/dts/xilfpga/nexys4ddr.dts @@ -42,6 +42,32 @@ xlnx,tri-default = <0xffffffff>; } ; + axi_ethernetlite: ethernet@10e00000 { + compatible = "xlnx,xps-ethernetlite-3.00.a"; + device_type = "network"; + interrupt-parent = <&axi_intc>; + interrupts = <1>; + phy-handle = <&phy0>; + reg = <0x10e00000 0x10000>; + xlnx,duplex = <0x1>; + xlnx,include-global-buffers = <0x1>; + xlnx,include-internal-loopback = <0x0>; + xlnx,include-mdio = <0x1>; + xlnx,instance = "axi_ethernetlite_inst"; + xlnx,rx-ping-pong = <0x1>; + xlnx,s-axi-id-width = <0x1>; + xlnx,tx-ping-pong = <0x1>; + xlnx,use-internal = <0x0>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: phy@1 { + device_type = "ethernet-phy"; + reg = <1>; + }; + }; + }; + axi_uart16550: serial@10400000 { compatible = "ns16550a"; reg = <0x10400000 0x10000>; -- 1.9.1