Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759016AbcJRHu6 convert rfc822-to-8bit (ORCPT ); Tue, 18 Oct 2016 03:50:58 -0400 Received: from smtp4-g21.free.fr ([212.27.42.4]:7471 "EHLO smtp4-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751752AbcJRHuw (ORCPT ); Tue, 18 Oct 2016 03:50:52 -0400 Date: Tue, 18 Oct 2016 09:50:44 +0200 From: Jean-Francois Moine To: Chen-Yu Tsai Cc: Michael Turquette , Stephen Boyd , Maxime Ripard , linux-sunxi@googlegroups.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent Message-Id: <20161018095044.d1664c4935ad13007453fb35@free.fr> In-Reply-To: <20161018054209.24546-1-wens@csie.org> References: <20161018054209.24546-1-wens@csie.org> X-Mailer: Sylpheed 3.5.1 (GTK+ 2.24.31; armv7l-unknown-linux-gnueabihf) Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 822 Lines: 19 On Tue, 18 Oct 2016 13:42:09 +0800 Chen-Yu Tsai wrote: > On the A31, the DMA engine only works if AHB1 is clocked from PLL6. > In addition, the hstimer is clocked from AHB1, and if AHB1 is clocked > from the CPU clock, and cpufreq is working, we get an unstable timer. > > Force the AHB1 clock to use PLL6 as its parent. Previously this was done > in the device tree with the assigned-clocks and assigned-clocks-parent > bindings. However with this new monolithic driver, the system critical > clocks aren't exported through the device tree. The alternative is to > force this setting in the driver before the clocks are registered. It should be simpler to export the constant (CLK_AHB1) instead of adding code... -- Ken ar c'henta? | ** Breizh ha Linux atav! ** Jef | http://moinejf.free.fr/