Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933476AbcJRH57 (ORCPT ); Tue, 18 Oct 2016 03:57:59 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:55626 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932340AbcJRH5y (ORCPT ); Tue, 18 Oct 2016 03:57:54 -0400 MIME-Version: 1.0 In-Reply-To: <20161018095044.d1664c4935ad13007453fb35@free.fr> References: <20161018054209.24546-1-wens@csie.org> <20161018095044.d1664c4935ad13007453fb35@free.fr> From: Chen-Yu Tsai Date: Tue, 18 Oct 2016 15:57:29 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent To: Jean-Francois Moine Cc: Chen-Yu Tsai , Michael Turquette , Stephen Boyd , Maxime Ripard , linux-sunxi , linux-clk , linux-arm-kernel , linux-kernel Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 929 Lines: 21 On Tue, Oct 18, 2016 at 3:50 PM, Jean-Francois Moine wrote: > On Tue, 18 Oct 2016 13:42:09 +0800 > Chen-Yu Tsai wrote: > >> On the A31, the DMA engine only works if AHB1 is clocked from PLL6. >> In addition, the hstimer is clocked from AHB1, and if AHB1 is clocked >> from the CPU clock, and cpufreq is working, we get an unstable timer. >> >> Force the AHB1 clock to use PLL6 as its parent. Previously this was done >> in the device tree with the assigned-clocks and assigned-clocks-parent >> bindings. However with this new monolithic driver, the system critical >> clocks aren't exported through the device tree. The alternative is to >> force this setting in the driver before the clocks are registered. > > It should be simpler to export the constant (CLK_AHB1) instead of > adding code... I get you. But the plan is to not export system core clocks that don't have a direct user. ChenYu