Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753090AbcJSOKk (ORCPT ); Wed, 19 Oct 2016 10:10:40 -0400 Received: from up.free-electrons.com ([163.172.77.33]:59522 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751012AbcJSOJu (ORCPT ); Wed, 19 Oct 2016 10:09:50 -0400 From: Alexandre Belloni To: Sebastian Reichel , Dmitry Eremin-Solenikov Cc: Nicolas Ferre , Jean-Jacques Hiblot , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Belloni Subject: [PATCH v2 0/2] ARM: at91: properly handle LPDDR poweroff Date: Wed, 19 Oct 2016 13:44:18 +0200 Message-Id: <20161019114420.15213-1-alexandre.belloni@free-electrons.com> X-Mailer: git-send-email 2.9.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1023 Lines: 31 Hi, This patch set improves LPDDR support on SoCs using the Atmel MPDDR controller. LPDDR memories can only handle up to 400 uncontrolled power offs in their life. The proper power off sequence has to be applied before shutting down the SoC. I'm not too happy with the code duplication but this is a design choice that has been made before because both shutdown controllers are really different apart from the shutdown itself. I guess it is still better than slowly killing the LPDDR. Changes in v2: - Fix typos - Add a comment for the dummy read access of AT91_SHDW_CR - Properly set up pm_power_off in at91_poweroff_probe() Alexandre Belloni (2): ARM: at91: define LPDDR types power/reset: at91-poweroff: timely shutdown LPDDR memories drivers/power/reset/at91-poweroff.c | 54 +++++++++++++++++++++++++++++++- drivers/power/reset/at91-sama5d2_shdwc.c | 49 ++++++++++++++++++++++++++++- include/soc/at91/at91sam9_ddrsdr.h | 3 ++ 3 files changed, 104 insertions(+), 2 deletions(-) -- 2.9.3