Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S945558AbcJSPmr (ORCPT ); Wed, 19 Oct 2016 11:42:47 -0400 Received: from mail-io0-f170.google.com ([209.85.223.170]:32785 "EHLO mail-io0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S942207AbcJSPmp (ORCPT ); Wed, 19 Oct 2016 11:42:45 -0400 MIME-Version: 1.0 In-Reply-To: <4369153.vCOQzI7OET@avalon> References: <1476721850-454-1-git-send-email-bgolaszewski@baylibre.com> <1476721850-454-3-git-send-email-bgolaszewski@baylibre.com> <4369153.vCOQzI7OET@avalon> From: Bartosz Golaszewski Date: Wed, 19 Oct 2016 10:26:57 +0200 Message-ID: Subject: Re: [PATCH 2/3] ARM: bus: da8xx-syscfg: new driver To: Laurent Pinchart Cc: Kevin Hilman , Michael Turquette , Sekhar Nori , Rob Herring , Frank Rowand , Mark Rutland , Peter Ujfalusi , Russell King , LKML , arm-soc , linux-drm , linux-devicetree , Jyri Sarha , Tomi Valkeinen , David Airlie Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2535 Lines: 87 2016-10-18 22:49 GMT+02:00 Laurent Pinchart : > Hi Bartosz, > > Thank you for the patch. > > On Monday 17 Oct 2016 18:30:49 Bartosz Golaszewski wrote: >> Create the driver for the da8xx System Configuration and implement >> support for writing to the three Master Priority registers. >> >> Signed-off-by: Bartosz Golaszewski [snip] >> + >> +Documentation: >> +OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf >> + >> +Required properties: >> + >> +- compatible: "ti,da850-syscfg" > > Don't you need a reg property ? > Yes, Kevin already pointed that out. I'll add it in v2. Same for [1/3]. >> +Optional properties: >> + >> +The below properties are used to specify the priority of master >> peripherals. >> +They must be between 0-7 where 0 is the highest priority and 7 is the >> lowest. >> + >> +- ti,pri-arm-i: ARM_I port priority. >> + >> +- ti,pri-arm-d: ARM_D port priority. >> + >> +- ti,pri-upp: uPP port priority. >> + >> +- ti,pri-sata: SATA port priority. >> + >> +- ti,pri-pru0: PRU0 port priority. >> + >> +- ti,pri-pru1: PRU1 port priority. >> + >> +- ti,pri-edma30tc0: EDMA3_0_TC0 port priority. >> + >> +- ti,pri-edma30tc1: EDMA3_0_TC1 port priority. >> + >> +- ti,pri-edma31tc0: EDMA3_1_TC0 port priority. >> + >> +- ti,pri-vpif-dma-0: VPIF DMA0 port priority. >> + >> +- ti,pri-vpif-dma-1: VPIF DMA1 port priority. >> + >> +- ti,pri-emac: EMAC port priority. >> + >> +- ti,pri-usb0cfg: USB0 CFG port priority. >> + >> +- ti,pri-usb0cdma: USB0 CDMA port priority. >> + >> +- ti,pri-uhpi: HPI port priority. >> + >> +- ti,pri-usb1: USB1 port priority. >> + >> +- ti,pri-lcdc: LCDC port priority. > > I'm afraid this looks more like system configuration than hardware description > to me. > While you're certainly right, this approach is already implemented in several other memory and bus drivers and it was also suggested by Sekhar in one of the tilcdc rev1 threads. There's also no real alternative that I know of. > There was a BoF session about how to support this kind of performance knobs at > ELCE last week: https://openiotelceurope2016.sched.org/event/7rss/bof-linux-device-performance-framework-michael-turquette-baylibre :-) > I know, I was there. ;) Unfortunately it was just a discussion about potential approaches - there's no code yet. Thanks, Bartosz