Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755944AbcJTLnO (ORCPT ); Thu, 20 Oct 2016 07:43:14 -0400 Received: from mail-lf0-f54.google.com ([209.85.215.54]:34063 "EHLO mail-lf0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754879AbcJTLnM (ORCPT ); Thu, 20 Oct 2016 07:43:12 -0400 From: Neil Armstrong To: carlo@caione.org, khilman@baylibre.com Cc: Neil Armstrong , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/4] ARM64: dts: meson-gxbb: Add Wifi 32K clock for p20x boards Date: Thu, 20 Oct 2016 13:42:55 +0200 Message-Id: <1476963777-1804-3-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1476963777-1804-1-git-send-email-narmstrong@baylibre.com> References: <1476963777-1804-1-git-send-email-narmstrong@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1079 Lines: 39 Add a 32768Hz clock generated by the PWM E port used by the WiFi module. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi index 86e740f..6861b0a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi @@ -111,6 +111,13 @@ compatible = "mmc-pwrseq-emmc"; reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; }; /* This UART is brought out to the DB9 connector */ @@ -205,3 +212,11 @@ vmmc-supply = <&vcc_3v3>; vqmmc-supply = <&vddio_boot>; }; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; -- 1.9.1