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Subject: Re: [PATCH v2 1/6] clk: stm32f4: Add LSI & LSE clocks
To: Stephen Boyd <sboyd@codeaurora.org>
References: <1476436699-21879-1-git-send-email-gabriel.fernandez@st.com>
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 <20161019202433.GA8871@codeaurora.org>
CC: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
        Russell King <linux@armlinux.org.uk>,
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From: Gabriel Fernandez <gabriel.fernandez@st.com>
Message-ID: <2e6e123e-4bb8-951c-9d49-4cb5480c37fd@st.com>
Date: Thu, 20 Oct 2016 18:05:15 +0200
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Hi Stephen,


On 10/19/2016 10:24 PM, Stephen Boyd wrote:
> On 10/14, gabriel.fernandez@st.com wrote:
>> @@ -292,8 +298,110 @@ static int stm32f4_rcc_lookup_clk_idx(u8 primary, u8 secondary)
>>   	return clks[i];
>>   }
>>   
>> +static struct regmap *pdrm;
> This can't be part of the stm32_rgate structure?
Finally i prefer not, because i need also to disable power domain write 
protection in the patch 4 (clk: stm32f4: Add RTC clock).
its will complicate the code.

BR

Gabriel