Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754640AbcJUITf (ORCPT ); Fri, 21 Oct 2016 04:19:35 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:36133 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754310AbcJUIT3 (ORCPT ); Fri, 21 Oct 2016 04:19:29 -0400 From: Imre Palik To: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org Cc: Peter Zijlstra , Andi Kleen , Stephane Eranian , Kan Liang , David Carrillo-Cisneros , linux-kernel@vger.kernel.org, Alexander Kozyrev , Artyom Kuanbekov , Imre Palik , Matt Wilson , David Woodhouse Subject: [RFC PATCH v2] perf: honouring the cpuid for number of fixed counters in hypervisors Date: Fri, 21 Oct 2016 01:18:59 -0700 Message-Id: <1477037939-15605-1-git-send-email-imrep.amz@gmail.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1467 Lines: 44 From: Imre Palik perf doesn't seem to honour the number of fixed counters specified by cpuid leaf 0xa. It always assume that Intel CPUs have at least 3 fixed counters. So if some of the fixed counters are masked out by the hypervisor, it still tries to check/set them. This patch makes perf behave nicer when the kernel is running under a hypervisor that doesn't expose all the counters. This patch contains some ideas from Matt Wilson. Signed-off-by: Imre Palik Cc: Matt Wilson Cc: David Woodhouse --- arch/x86/events/intel/core.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index a3a9eb8..e06d071 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3607,10 +3607,14 @@ __init int intel_pmu_init(void) /* * Quirk: v2 perfmon does not report fixed-purpose events, so - * assume at least 3 events: + * assume at least 3 events, when not running in a hypervisor: */ - if (version > 1) - x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3); + if (version > 1) { + if (static_cpu_has(X86_FEATURE_HYPERVISOR)) + x86_pmu.num_counters_fixed = edx.split.num_counters_fixed; + else + x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3); + } if (boot_cpu_has(X86_FEATURE_PDCM)) { u64 capabilities; -- 2.10.1