Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934854AbcJUJY2 (ORCPT ); Fri, 21 Oct 2016 05:24:28 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:32874 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S933831AbcJUJYW (ORCPT ); Fri, 21 Oct 2016 05:24:22 -0400 From: To: Rob Herring , Mark Rutland , Russell King , Maxime Coquelin , Alexandre Torgue , Michael Turquette , Stephen Boyd , Nicolas Pitre , Arnd Bergmann , CC: , , , , , , , Subject: [PATCH v3 0/3] STM32F4 Add RTC & QSPI clocks Date: Fri, 21 Oct 2016 11:23:27 +0200 Message-ID: <1477041810-12313-1-git-send-email-gabriel.fernandez@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.48.1.80] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-10-21_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1091 Lines: 40 From: Gabriel Fernandez v3: - remove arm & DT patches from this patch-set - solve issue of dependency with DT - remove clk_hw from struct stm32_rgate (use hw of clk_gate) - suppress CLK_IS_BASIC flags of clk_register_rgate() - cosmetic changes v2: - rename compatible property "st,stm32f46xx-rcc" into "st,stm32f469-rcc" - cosmetic: remove bad copy/paste This patch-set introduce RTC and QSPI clocks for STM32F4 socs RTC clock has 3 parents clock oscillators (lsi/lse/hse_rtc) example to use rtc clock: rtc: rtc@40002800 { compatible = "st,stm32-rtc"; reg = <0x40002800 0x400>; ... clocks = <&rcc 1 CLK_RTC>; assigned-clocks = <&rcc 1 CLK_RTC>; assigned-clock-parents = <&rcc 1 CLK_LSE>; ... }; Gabriel Fernandez (3): clk: stm32f4: Add LSI & LSE clocks clk: stm32f4: Add RTC clock clk: stm32f469: Add QSPI clock .../devicetree/bindings/clock/st,stm32-rcc.txt | 4 +- drivers/clk/clk-stm32f4.c | 435 ++++++++++++++++++++- 2 files changed, 417 insertions(+), 22 deletions(-) -- 1.9.1