Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933967AbcJUNRv (ORCPT ); Fri, 21 Oct 2016 09:17:51 -0400 Received: from xavier.telenet-ops.be ([195.130.132.52]:53774 "EHLO xavier.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932905AbcJUNRj (ORCPT ); Fri, 21 Oct 2016 09:17:39 -0400 From: Geert Uytterhoeven To: Philipp Zabel , Michael Turquette , Stephen Boyd , Simon Horman , Magnus Damm Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v4 12/23] clk: renesas: r8a7778: Obtain mode pin values using R-Car RST driver Date: Fri, 21 Oct 2016 15:17:26 +0200 Message-Id: <1477055857-17936-13-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477055857-17936-1-git-send-email-geert+renesas@glider.be> References: <1477055857-17936-1-git-send-email-geert+renesas@glider.be> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1309 Lines: 48 Obtain the values of the mode pins from the R-Car RST driver, which relies on the presence in DT of a device node for the RESET/WDT module. Signed-off-by: Geert Uytterhoeven Acked-by: Dirk Behme --- v4: - Add Acked-by, v3: - New. --- drivers/clk/renesas/clk-r8a7778.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/clk/renesas/clk-r8a7778.c b/drivers/clk/renesas/clk-r8a7778.c index 40e3a501a50e200f..07ea411098a75ad1 100644 --- a/drivers/clk/renesas/clk-r8a7778.c +++ b/drivers/clk/renesas/clk-r8a7778.c @@ -12,6 +12,7 @@ #include #include #include +#include struct r8a7778_cpg { struct clk_onecell_data data; @@ -83,6 +84,18 @@ static void __init r8a7778_cpg_clocks_init(struct device_node *np) struct clk **clks; unsigned int i; int num_clks; + u32 mode; + + if (rcar_rst_read_mode_pins(&mode)) + return; + + BUG_ON(!(mode & BIT(19))); + + cpg_mode_rates = (!!(mode & BIT(18)) << 2) | + (!!(mode & BIT(12)) << 1) | + (!!(mode & BIT(11))); + cpg_mode_divs = (!!(mode & BIT(2)) << 1) | + (!!(mode & BIT(1))); num_clks = of_property_count_strings(np, "clock-output-names"); if (num_clks < 0) { -- 1.9.1