Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756760AbcJWWBt (ORCPT ); Sun, 23 Oct 2016 18:01:49 -0400 Received: from mo3.mail-out.ovh.net ([178.32.228.3]:40345 "EHLO mo3.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753678AbcJWWBp (ORCPT ); Sun, 23 Oct 2016 18:01:45 -0400 From: Lukasz Majewski To: Thierry Reding , Stefan Agner , Boris Brezillon Cc: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Fabio Estevam , Fabio Estevam , Lothar Wassmann , Bhuvanchandra DV , kernel@pengutronix.de, Lukasz Majewski Subject: [PATCH 2/6] pwm: imx: Move PWMv2 software reset code to a separate function Date: Sun, 23 Oct 2016 23:45:42 +0200 Message-Id: <1477259146-19167-3-git-send-email-l.majewski@majess.pl> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1477259146-19167-1-git-send-email-l.majewski@majess.pl> References: <1477259146-19167-1-git-send-email-l.majewski@majess.pl> X-Ovh-Tracer-Id: 3439624218974732933 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelvddrieeggddtjecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2199 Lines: 74 The software reset code has been extracted from imx_pwm_config_v2 function and moved to new one - imx_pwm_sw_reset(). This change reduces the overall size of imx_pwm_config_v2() and prepares it for atomic PWM operation. Suggested-by: Stefan Agner Suggested-by: Boris Brezillon Signed-off-by: Lukasz Majewski --- drivers/pwm/pwm-imx.c | 34 ++++++++++++++++++++++------------ 1 file changed, 22 insertions(+), 12 deletions(-) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 83e43d5..fac5c93 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -131,6 +131,25 @@ static void imx_pwm_disable_v1(struct pwm_chip *chip, struct pwm_device *pwm) clk_disable_unprepare(imx->clk_per); } +static void imx_pwm_sw_reset(struct pwm_chip *chip) +{ + struct imx_chip *imx = to_imx_chip(chip); + struct device *dev = chip->dev; + int wait_count = 0; + u32 cr; + + writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); + do { + usleep_range(200, 1000); + cr = readl(imx->mmio_base + MX3_PWMCR); + } while ((cr & MX3_PWMCR_SWR) && + (wait_count++ < MX3_PWM_SWR_LOOP)); + + if (cr & MX3_PWMCR_SWR) + dev_warn(dev, "software reset timeout\n"); +} + + static int imx_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { @@ -140,7 +159,7 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, unsigned long period_cycles, duty_cycles, prescale; unsigned int period_ms; bool enable = pwm_is_enabled(pwm); - int wait_count = 0, fifoav; + int fifoav; u32 cr, sr; /* @@ -162,17 +181,8 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, if (fifoav == (sr & MX3_PWMSR_FIFOAV_MASK)) dev_warn(dev, "there is no free FIFO slot\n"); } - } else { - writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); - do { - usleep_range(200, 1000); - cr = readl(imx->mmio_base + MX3_PWMCR); - } while ((cr & MX3_PWMCR_SWR) && - (wait_count++ < MX3_PWM_SWR_LOOP)); - - if (cr & MX3_PWMCR_SWR) - dev_warn(dev, "software reset timeout\n"); - } + } else + imx_pwm_sw_reset(chip); c = clk_get_rate(imx->clk_per); c = c * period_ns; -- 2.1.4