Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756546AbcJXKS6 (ORCPT ); Mon, 24 Oct 2016 06:18:58 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:44359 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750955AbcJXKSz (ORCPT ); Mon, 24 Oct 2016 06:18:55 -0400 DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 387EE6179F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=sricharan@codeaurora.org From: Sricharan R To: sboyd@codeaurora.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, rnayak@codeaurora.org, stanimir.varbanov@linaro.org Cc: sricharan@codeaurora.org Subject: [PATCH 0/3] clk: qcom: Add support for hw controlled gdscs/clocks Date: Mon, 24 Oct 2016 15:48:14 +0530 Message-Id: <1477304297-5248-1-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 768 Lines: 19 This series adds support for gdscs(powerdomains) that can be configured in hw controlled mode. So they are turned 'ON' based on needs dynamically, helping to save power. Also updated the venus video ip's gdsc/clock data to put them in hw control. Rajendra Nayak (1): clk: qcom: gdsc: Add support for gdscs with HW control Sricharan R (2): clk: qcom: Put venus core0/1 gdscs to hw control mode clk: qcom: Set BRANCH_HALT_DELAY flags for venus core0/1 clks drivers/clk/qcom/gdsc.c | 15 +++++++++++++++ drivers/clk/qcom/gdsc.h | 1 + drivers/clk/qcom/mmcc-msm8996.c | 4 ++++ 3 files changed, 20 insertions(+) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation