Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759512AbcJYVOQ (ORCPT ); Tue, 25 Oct 2016 17:14:16 -0400 Received: from b.ns.miles-group.at ([95.130.255.144]:44723 "EHLO radon.swed.at" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755690AbcJYVOO (ORCPT ); Tue, 25 Oct 2016 17:14:14 -0400 Subject: Re: UBIFS LEB properties tree with odd addresses To: Naga Sureshkumar Relli , Christoph Hellwig References: Cc: "dwmw2@infradead.org" , "computersforpeace@gmail.com" , "dedekind1@gmail.com" , "adrian.hunter@intel.com" , "michal.simek@xilinx.com" , Punnaiah Choudary Kalluri , "linux-mtd@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Boris Brezillon From: Richard Weinberger Message-ID: Date: Tue, 25 Oct 2016 23:14:07 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3000 Lines: 64 Naga Sureshkumar Relli, On 25.10.2016 08:05, Naga Sureshkumar Relli wrote: > Hi, > > We are testing UBIFS (NOR) on Zynq Ultrascale+ MPSoC GQSPI controller driver. > Apart from my previous mail thread about UBIFS, i.e along with dma issue I am facing one more > Problem related to offsets. > > Info about GQSPI Controller: > This controller can access the flash device in the following modes. > 1. Single flash mode > 2. Two spi flash memories with separate buses (dual parallel) > > Single flash mode: it is normal configuration, one controller and one flash memory > > In dual parallel mode following are the functionalities: > 1) Supporting two SPI flash memories operating in parallel. 8 I/O lines. > 2) Chip selects and clock are shared to both the flash devices > 3) This mode is targeted for faster read/write speed and also doubles the size > 4) Commands/data can be transmitted/received from both the devices(mirror), or only upper or only lower flash memory devices. > 5) Data arrangement: > With stripe (controller configuration) enabled, > Even bytes i.e. 0, 2, 4,... are transmitted on Lower Data Bus > Odd bytes i.e. 1, 3, 5,.. are transmitted on Upper Data Bus. But these details are hidden from UBI? > Kernel version : 4.4.0 > Controller limitation: ZynqMP gqspi controller supports only even addresses when two flash devices are connected (dual parallel mode). > > Issue I am facing: > -> Since our controller supports even addresses in dual parallel mode > We are seeing issues with ubifs in dual parallel mode and jffs2 is working fine and we observed the following: > > IN dual parallel mode, the Erase block size was 128KiB whereas single flash mode the Erase block size was 64KiB. > In single flash mode, we are getting pnode_sz value as 16 and for dual parallel mode we are getting an odd value 17 > And ltab_sz value in single mode as 12 and in dual parallel mode as 11. > Because of these odd values, check_lpt_type offset argument is odd address and hence lpt_type error. > > When I ran the mnt command, I am getting the following error > "UBIFS error (ubi0:0 pid 1882): check_lpt_type: invalid type (4) in LPT node type 2" > Ran the below commands: > a)ubiformat /dev/mtd0 -e 0 -y > b)ubiattach -p /dev/mtd0 > c)ubimkvol -N data -m /dev/ubi0 > d)mount -t ubifs ubi0:data /mnt > > So for temporary hack we did the following change > In fs/ubifs/lpt.c > In do_calc_lpt_geom(), added the following > + if (c->pnode_sz % 2) > + c->pnode_sz += 1; > + if (c->ltab_sz % 2) > + c->ltab_sz += 1; > > Please kindly suggest, I need your inputs, changing the pnode_sz and ltab_sz to even in lpt.c, will it impact on any others? Hmm, the calculations in lpt.c use basic properties of the MTD (number of blocks, etc...). Can you please double check which property causes the failure and also verify whether the MTD driver provides correct properties. i.e. page sizes, block size, number of blocks, ... Thanks, //richard