Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S943009AbcJZNTo (ORCPT ); Wed, 26 Oct 2016 09:19:44 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:55268 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934022AbcJZM1m (ORCPT ); Wed, 26 Oct 2016 08:27:42 -0400 From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Vladimir Murzin , James Morse , Marc Zyngier , Christoffer Dall Subject: [PATCH 4.8 089/140] arm64: KVM: VHE: reset PSTATE.PAN on entry to EL2 Date: Wed, 26 Oct 2016 14:22:29 +0200 Message-Id: <20161026122224.188699240@linuxfoundation.org> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20161026122220.384323763@linuxfoundation.org> References: <20161026122220.384323763@linuxfoundation.org> User-Agent: quilt/0.64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1330 Lines: 42 4.8-stable review patch. If anyone has any objections, please let me know. ------------------ From: Vladimir Murzin commit cb96408da4e11698674abd04aeac941c1bed2038 upstream. SCTLR_EL2.SPAN bit controls what happens with the PSTATE.PAN bit on an exception. However, this bit has no effect on the PSTATE.PAN when HCR_EL2.E2H or HCR_EL2.TGE is unset. Thus when VHE is used and exception taken from a guest PSTATE.PAN bit left unchanged and we continue with a value guest has set. To address that always reset PSTATE.PAN on entry from EL1. Fixes: 1f364c8c48a0 ("arm64: VHE: Add support for running Linux in EL2 mode") Signed-off-by: Vladimir Murzin Reviewed-by: James Morse Acked-by: Marc Zyngier Signed-off-by: Christoffer Dall [ rebased for v4.7+ ] Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kvm/hyp/entry.S | 2 ++ 1 file changed, 2 insertions(+) --- a/arch/arm64/kvm/hyp/entry.S +++ b/arch/arm64/kvm/hyp/entry.S @@ -98,6 +98,8 @@ ENTRY(__guest_exit) // x4-x29,lr: vcpu regs // vcpu x0-x3 on the stack + ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN) + add x2, x0, #VCPU_CONTEXT stp x4, x5, [x2, #CPU_XREG_OFFSET(4)]