Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933993AbcJ0GbC (ORCPT ); Thu, 27 Oct 2016 02:31:02 -0400 Received: from 15.mo4.mail-out.ovh.net ([91.121.62.11]:57310 "EHLO 15.mo4.mail-out.ovh.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932605AbcJ0GbB (ORCPT ); Thu, 27 Oct 2016 02:31:01 -0400 X-Greylist: delayed 9833 seconds by postgrey-1.27 at vger.kernel.org; Thu, 27 Oct 2016 02:31:01 EDT From: Lukasz Majewski To: Thierry Reding , Stefan Agner , Boris Brezillon Cc: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Fabio Estevam , Fabio Estevam , Lothar Wassmann , Bhuvanchandra DV , kernel@pengutronix.de, Lukasz Majewski Subject: [PATCH v2 04/10] pwm: imx: Move PWMv2 software reset code to a separate function Date: Thu, 27 Oct 2016 08:29:40 +0200 Message-Id: <1477549785-4972-5-git-send-email-l.majewski@majess.pl> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1477549785-4972-1-git-send-email-l.majewski@majess.pl> References: <1477549785-4972-1-git-send-email-l.majewski@majess.pl> X-Ovh-Tracer-Id: 11467009079761420933 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelvddrjedtgdduudduucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2165 Lines: 75 The software reset code has been extracted from imx_pwm_config_v2 function and moved to new one - imx_pwm_sw_reset(). This change reduces the overall size of imx_pwm_config_v2() and prepares it for atomic PWM operation. Suggested-by: Stefan Agner Suggested-by: Boris Brezillon Signed-off-by: Lukasz Majewski --- Changes for v2: - Add missing parenthesis --- drivers/pwm/pwm-imx.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 822eb5a..8174ae6 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -134,6 +134,25 @@ static void imx_pwm_disable_v1(struct pwm_chip *chip, struct pwm_device *pwm) clk_disable_unprepare(imx->clk_per); } +static void imx_pwm_sw_reset(struct pwm_chip *chip) +{ + struct imx_chip *imx = to_imx_chip(chip); + struct device *dev = chip->dev; + int wait_count = 0; + u32 cr; + + writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); + do { + usleep_range(200, 1000); + cr = readl(imx->mmio_base + MX3_PWMCR); + } while ((cr & MX3_PWMCR_SWR) && + (wait_count++ < MX3_PWM_SWR_LOOP)); + + if (cr & MX3_PWMCR_SWR) + dev_warn(dev, "software reset timeout\n"); +} + + static int imx_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { @@ -143,7 +162,7 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, unsigned long period_cycles, duty_cycles, prescale; unsigned int period_ms; bool enable = pwm_is_enabled(pwm); - int wait_count = 0, fifoav; + int fifoav; u32 cr, sr; /* @@ -166,15 +185,7 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, dev_warn(dev, "there is no free FIFO slot\n"); } } else { - writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); - do { - usleep_range(200, 1000); - cr = readl(imx->mmio_base + MX3_PWMCR); - } while ((cr & MX3_PWMCR_SWR) && - (wait_count++ < MX3_PWM_SWR_LOOP)); - - if (cr & MX3_PWMCR_SWR) - dev_warn(dev, "software reset timeout\n"); + imx_pwm_sw_reset(chip); } c = clk_get_rate(imx->clk_per); -- 2.1.4