Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030302AbcJ0OGx (ORCPT ); Thu, 27 Oct 2016 10:06:53 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:43760 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S942356AbcJ0OEw (ORCPT ); Thu, 27 Oct 2016 10:04:52 -0400 Date: Thu, 27 Oct 2016 10:21:58 +0200 (CEST) From: Thomas Gleixner To: Kyle Huey cc: "Robert O'Callahan" , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Jeff Dike , Richard Weinberger , Andy Lutomirski , Borislav Petkov , Dmitry Safonov , Peter Zijlstra , Dave Hansen , Boris Ostrovsky , Alexander Viro , Shuah Khan , "Rafael J. Wysocki" , Len Brown , linux-kernel@vger.kernel.org, user-mode-linux-devel@lists.sourceforge.net, user-mode-linux-user@lists.sourceforge.net, linux-kselftest@vger.kernel.org, linux-api@vger.kernel.org Subject: Re: [PATCH v7 5/6] x86/cpufeature: Detect CPUID faulting support In-Reply-To: <20161019020333.3766-6-khuey@kylehuey.com> Message-ID: References: <20161019020333.3766-1-khuey@kylehuey.com> <20161019020333.3766-6-khuey@kylehuey.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1900 Lines: 82 On Tue, 18 Oct 2016, Kyle Huey wrote: > > +static bool supports_cpuid_faulting(void) > +{ > + unsigned int lo, hi; > + > + if (rdmsr_safe(MSR_PLATFORM_INFO, &lo, &hi)) > + return false; > + > + return lo & PLATINFO_CPUID_FAULT; > +} > + > void init_scattered_cpuid_features(struct cpuinfo_x86 *c) > { > u32 max_level; > @@ -54,4 +64,7 @@ void init_scattered_cpuid_features(struct cpuinfo_x86 *c) > if (regs[cb->reg] & (1 << cb->bit)) > set_cpu_cap(c, cb->feature); > } > + > + if (supports_cpuid_faulting()) > + set_cpu_cap(c, X86_FEATURE_CPUID_FAULT); > } Instead of specific magic for this feature I'd rather like to see something like the completely untested patch below. That allows us to add MSR based features trivially in the future. Thanks, tglx 8<------------------------ --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -24,11 +24,18 @@ enum cpuid_regs { CR_EBX }; +struct msr_bit { + u16 feature; + u16 msr; + u8 bit; +}; + void init_scattered_cpuid_features(struct cpuinfo_x86 *c) { - u32 max_level; - u32 regs[4]; const struct cpuid_bit *cb; + const struct msr_bit *mb; + u32 max_level, regs[4]; + u64 msrval; static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_INTEL_PT, CR_EBX,25, 0x00000007, 0 }, @@ -42,6 +49,11 @@ void init_scattered_cpuid_features(struc { 0, 0, 0, 0, 0 } }; + static const struct msr_bit msr_bits[] = { + { X86_FEATURE_CPUID_FAULT, MSR_PLATFORM_INFO, 31 }, + { 0, 0, 0 } + }; + for (cb = cpuid_bits; cb->feature; cb++) { /* Verify that the level is valid */ @@ -56,4 +68,12 @@ void init_scattered_cpuid_features(struc if (regs[cb->reg] & (1 << cb->bit)) set_cpu_cap(c, cb->feature); } + + for (mb = msr_bits; mb->feature; mb++) { + if (rdmsrl_safe(mb->msr, &msrval)) + continue; + if (msrval & (1ULL << mb->bit)) + set_cpu_cap(c, mb->feature); + } + }