Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756197AbcJ1Gyw (ORCPT ); Fri, 28 Oct 2016 02:54:52 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:35425 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751269AbcJ1Gys (ORCPT ); Fri, 28 Oct 2016 02:54:48 -0400 From: Milo Kim To: Maxime Ripard , Chen-Yu Tsai , Mark Brown Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Milo Kim Subject: [PATCH v2 0/4] Support H3 SPI controller Date: Fri, 28 Oct 2016 15:54:08 +0900 Message-Id: <20161028065412.23008-1-woogyom.kim@gmail.com> X-Mailer: git-send-email 2.9.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1180 Lines: 34 Allwinner H3 SPI controller has same architecture as A31. So most configuration is identical except one thing - FIFO capacity. A31 H3 ------------------------------------ Number of controllers 4 2 Number of FIFO depth 128 64 Transfer bits 8 8 Register maps are sharable, so sun6i SPI driver is reusable with device configuration. Tested on Nano Pi M1 and SPI slave device is TI LP8860. v2: Include DTS patches Use of_device_get_match_data() helper to get device specific data Fix build warning of 64bit CPU architecture (warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]) Milo Kim (4): ARM: dts: sun8i: Add SPI pinctrl node in H3 ARM: dts: sun8i: Add SPI controller node in H3 spi: sun6i: Add binding for Allwinner H3 SPI controller spi: sun6i: Support Allwinner H3 SPI controller .../devicetree/bindings/spi/spi-sun6i.txt | 25 +++++++++++- arch/arm/boot/dts/sun8i-h3.dtsi | 46 ++++++++++++++++++++++ drivers/spi/spi-sun6i.c | 18 ++++++--- 3 files changed, 82 insertions(+), 7 deletions(-) -- 2.9.3