Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756425AbcJ1Gy6 (ORCPT ); Fri, 28 Oct 2016 02:54:58 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:36549 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756204AbcJ1Gyw (ORCPT ); Fri, 28 Oct 2016 02:54:52 -0400 From: Milo Kim To: Maxime Ripard , Chen-Yu Tsai , Mark Brown Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Milo Kim Subject: [PATCH v2 1/4] ARM: dts: sun8i: Add SPI pinctrl node in H3 Date: Fri, 28 Oct 2016 15:54:09 +0900 Message-Id: <20161028065412.23008-2-woogyom.kim@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161028065412.23008-1-woogyom.kim@gmail.com> References: <20161028065412.23008-1-woogyom.kim@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1130 Lines: 37 H3 supports two SPI controllers. Four pins (MOSI, MISO, SCLK, SS) are configured through the pinctrl subsystem. Cc: Maxime Ripard Cc: Chen-Yu Tsai Signed-off-by: Milo Kim --- arch/arm/boot/dts/sun8i-h3.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 75a8654..8a59d8d 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -381,6 +381,20 @@ allwinner,pull = ; }; + spi0_pins: spi0 { + allwinner,pins = "PC0", "PC1", "PC2", "PC3"; + allwinner,function = "spi0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + spi1_pins: spi1 { + allwinner,pins = "PA15", "PA16", "PA14", "PA13"; + allwinner,function = "spi1"; + allwinner,drive = ; + allwinner,pull = ; + }; + uart0_pins_a: uart0@0 { allwinner,pins = "PA4", "PA5"; allwinner,function = "uart0"; -- 2.9.3