Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964841AbcJ1Gzk (ORCPT ); Fri, 28 Oct 2016 02:55:40 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:36572 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751269AbcJ1Gy4 (ORCPT ); Fri, 28 Oct 2016 02:54:56 -0400 From: Milo Kim To: Maxime Ripard , Chen-Yu Tsai , Mark Brown Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Milo Kim Subject: [PATCH v2 2/4] ARM: dts: sun8i: Add SPI controller node in H3 Date: Fri, 28 Oct 2016 15:54:10 +0900 Message-Id: <20161028065412.23008-3-woogyom.kim@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161028065412.23008-1-woogyom.kim@gmail.com> References: <20161028065412.23008-1-woogyom.kim@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1635 Lines: 55 H3 SPI subsystem is almost same as A31 SPI except buffer size, so those DT properties are reusable. Cc: Maxime Ripard Cc: Chen-Yu Tsai Signed-off-by: Milo Kim --- arch/arm/boot/dts/sun8i-h3.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 8a59d8d..c38b028 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -439,6 +439,38 @@ clocks = <&osc24M>; }; + spi0: spi@01c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; + clock-names = "ahb", "mod"; + dmas = <&dma 23>, <&dma 23>; + dma-names = "rx", "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + resets = <&ccu RST_BUS_SPI0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@01c69000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c69000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; + clock-names = "ahb", "mod"; + dmas = <&dma 24>, <&dma 24>; + dma-names = "rx", "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + resets = <&ccu RST_BUS_SPI1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + wdt0: watchdog@01c20ca0 { compatible = "allwinner,sun6i-a31-wdt"; reg = <0x01c20ca0 0x20>; -- 2.9.3