Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761553AbcJ1RME (ORCPT ); Fri, 28 Oct 2016 13:12:04 -0400 Received: from gw.crowfest.net ([52.42.241.221]:48426 "EHLO gw.crowfest.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756242AbcJ1RMC (ORCPT ); Fri, 28 Oct 2016 13:12:02 -0400 From: Michael Zoran To: gregkh@linuxfoundation.org Cc: eric@anholt.net, swarren@wwwdotorg.org, lee@kernel.org, mzoran@crowfest.net, daniels@collabora.com, noralf@tronnes.org, popcornmix@gmail.com, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH] staging: vc04_services: setup DMA and coherent mask Date: Fri, 28 Oct 2016 10:11:59 -0700 Message-Id: <20161028171159.23973-1-mzoran@crowfest.net> X-Mailer: git-send-email 2.10.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1277 Lines: 35 Setting the DMA mask is optional on 32 bit but is mandatory on 64 bit. Set the DMA mask and coherent to force all DMA to be in the 32 bit address space. This is considered a "good practice" and most drivers already do this. Signed-off-by: Michael Zoran --- .../staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c index a5afcc5..6fa2b5a 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c @@ -97,6 +97,16 @@ int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state) int slot_mem_size, frag_mem_size; int err, irq, i; + /* + * Setting the DMA mask is necessary in the 64 bit environment. + * It isn't necessary in a 32 bit environment but is considered + * a good practice. + */ + err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); + + if (err < 0) + return err; + (void)of_property_read_u32(dev->of_node, "cache-line-size", &g_cache_line_size); g_fragments_size = 2 * g_cache_line_size; -- 2.10.1