Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S943425AbcJ2N5D (ORCPT ); Sat, 29 Oct 2016 09:57:03 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:50300 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S943330AbcJ2NyZ (ORCPT ); Sat, 29 Oct 2016 09:54:25 -0400 From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jean-Francois Moine , Stephen Boyd Subject: [PATCH 4.8 091/125] clk: core: Force setting the phase delay when no change Date: Sat, 29 Oct 2016 09:50:09 -0400 Message-Id: <20161029134950.955101839@linuxfoundation.org> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20161029134947.232372651@linuxfoundation.org> References: <20161029134947.232372651@linuxfoundation.org> User-Agent: quilt/0.64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1354 Lines: 48 4.8-stable review patch. If anyone has any objections, please let me know. ------------------ From: Jean-Francois Moine commit 3174b0c9a62bb3738b4a2a506b8a075d4430e353 upstream. This patch reverts commit 023bd7166be0 ("clk: skip unnecessary set_phase if nothing to do"), fixing two problems: * in some SoCs, the hardware phase delay depends on the rate ratio of the clock and its parent. So, changing this ratio may imply to set new hardware values, even if the logical delay is the same. * when the delay was the same as previously, an error was returned. Signed-off-by: Jean-Francois Moine Fixes: 023bd7166be0 ("clk: skip unnecessary set_phase if nothing to do") Signed-off-by: Stephen Boyd Signed-off-by: Greg Kroah-Hartman --- drivers/clk/clk.c | 5 ----- 1 file changed, 5 deletions(-) --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1908,10 +1908,6 @@ int clk_set_phase(struct clk *clk, int d clk_prepare_lock(); - /* bail early if nothing to do */ - if (degrees == clk->core->phase) - goto out; - trace_clk_set_phase(clk->core, degrees); if (clk->core->ops->set_phase) @@ -1922,7 +1918,6 @@ int clk_set_phase(struct clk *clk, int d if (!ret) clk->core->phase = degrees; -out: clk_prepare_unlock(); return ret;