Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965005AbcJaQ6p (ORCPT ); Mon, 31 Oct 2016 12:58:45 -0400 Received: from b.painless.aa.net.uk ([81.187.30.52]:35183 "EHLO b.painless.aa.net.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S944875AbcJaQ6l (ORCPT ); Mon, 31 Oct 2016 12:58:41 -0400 Subject: Re: [PATCH v4 2/2] fpga: Add support for Lattice iCE40 FPGAs To: Rob Herring References: <1477776746-3678-1-git-send-email-joel@airwebreathe.org.uk> <1477776746-3678-2-git-send-email-joel@airwebreathe.org.uk> <20161031063317.fqoaqemoiqhrrjzg@rob-hp-laptop> Cc: atull@opensource.altera.com, moritz.fischer@ettus.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org From: Joel Holdsworth Message-ID: Date: Mon, 31 Oct 2016 10:58:16 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: <20161031063317.fqoaqemoiqhrrjzg@rob-hp-laptop> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-Painless-Spam-Score: -1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1545 Lines: 51 Hi Rob, Thanks for taking the time review the patches. >> .../bindings/fpga/lattice-ice40-fpga-mgr.txt | 23 +++ > > It's preferred that bindings are a separate patch. Can you just clarify a little? I'm happy to split the patch up, but I don't understand how it could work without the bindings. For example, in ice40_fpga_probe, I have to get the GPIOs with devm_gpiod_get for the driver to work. Maybe I'm missing something. Or do you just mean the documentation? > > -gpios is preferred. > > Please state direction and polarity. Thanks, I'll fix that up. > >> +- creset_b-gpio: GPIO connected to CRESET_B pin. Note that CRESET_B is > > Don't use '_'. In this case, I'd just do cresetb-gpios. So the pin is called CRESET_B in the datasheet. I think the _B refers to the active-low polarity of the line. So I would think it should be creset-b-gpios or creset-gpios. I'm not so convinced cresetb-gpios is ideal, but it's a minor point. > >> + treated as an active-low output because the signal is >> + treated as an enable signal, rather than a reset. This > > Though for enable signals, enable-gpios is fairly standard even if that > deviates from the pin name. I would think that would just confuse the user, unless they dig out the binding docs. The FPGA doesn't have an enable pin, and it's not at all obvious that a "reset" pin means "enable" in this driver. Again, if you're adamant this is the correct convention it's no problem to make the change - just seems weird to me. What do you think? Thanks Joel