Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1167833AbcKAHRw (ORCPT ); Tue, 1 Nov 2016 03:17:52 -0400 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:51894 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1034097AbcKAHRt (ORCPT ); Tue, 1 Nov 2016 03:17:49 -0400 Date: Tue, 1 Nov 2016 08:17:43 +0100 From: Sascha Hauer To: Lukasz Majewski Cc: Boris Brezillon , linux-pwm@vger.kernel.org, Bhuvanchandra DV , linux-kernel@vger.kernel.org, Stefan Agner , Thierry Reding , kernel@pengutronix.de, Fabio Estevam , Philipp Zabel , Fabio Estevam , Lothar Wassmann Subject: Re: [PATCH v2 03/10] pwm: imx: Rewrite imx_pwm_*_v1 code to facilitate switch to atomic pwm operation Message-ID: <20161101071743.ef3nhdhaquhbgtlo@pengutronix.de> References: <1477549785-4972-1-git-send-email-l.majewski@majess.pl> <1477549785-4972-4-git-send-email-l.majewski@majess.pl> <20161027094005.2da3b7d4@bbrezillon> <20161031055904.av45k535c26gjonz@pengutronix.de> <20161031092937.im5epytgorcd5fbm@pengutronix.de> <20161101065723.7751a55e@jawa> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20161101065723.7751a55e@jawa> X-Sent-From: Pengutronix Hildesheim X-URL: http://www.pengutronix.de/ X-IRC: #ptxdist @freenode X-Accept-Language: de,en X-Accept-Content-Type: text/plain X-Uptime: 07:56:23 up 159 days, 17:20, 35 users, load average: 0.12, 0.07, 0.05 User-Agent: Mutt/1.6.2-neo (2016-06-11) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 979 Lines: 22 On Tue, Nov 01, 2016 at 06:57:23AM +0100, Lukasz Majewski wrote: > Hi Sascha, > > > The current assumption as discussed by Philipp and me is that the ipg > > clk is only needed when the pwm output is driven by the ipg clk > > (MX3_PWMCR[16:17] = MX3_PWMCR_CLKSRC_IPG) > > At least on my setup (i.MX6q) the ipg clock (ipg_clk) don't need to be > explicitly enabled in the ->apply() callback (in the pwm-imx.c) when > MX3_PWMCR_CLKSRC_IPG (0x01 - ipg_clk) is selected as the PWM source. No. If you look in the device tree you'll see that there is no special gateable ipg clock for the PWM. Instead the SoC ipg clock is registered for the PWM which is not gateable. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |