Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1168199AbcKAJ0u (ORCPT ); Tue, 1 Nov 2016 05:26:50 -0400 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:33649 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1168163AbcKAJ0s (ORCPT ); Tue, 1 Nov 2016 05:26:48 -0400 Message-ID: <1477992404.2475.40.camel@pengutronix.de> Subject: Re: [PATCH v3 02/11] pwm: imx: remove ipg clock From: Philipp Zabel To: Lukasz Majewski Cc: Thierry Reding , Stefan Agner , Sascha Hauer , Boris Brezillon , linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, Fabio Estevam , Fabio Estevam , Lothar Wassmann , Bhuvanchandra DV , kernel@pengutronix.de Date: Tue, 01 Nov 2016 10:26:44 +0100 In-Reply-To: <1477984230-18071-3-git-send-email-l.majewski@majess.pl> References: <1477984230-18071-1-git-send-email-l.majewski@majess.pl> <1477984230-18071-3-git-send-email-l.majewski@majess.pl> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:100:96de:80ff:fec2:9969 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1328 Lines: 28 Am Dienstag, den 01.11.2016, 08:10 +0100 schrieb Lukasz Majewski: > From: Sascha Hauer > > The use of the ipg clock was introduced with commit 7b27c160c681 > ("pwm: i.MX: fix clock lookup"). > In the commit message it was claimed that the ipg clock is enabled for > register accesses. This is true for the ->config() callback, but not > for the ->set_enable() callback. Given that the ipg clock is not > consistently enabled for all register accesses we can assume that either > it is not required at all or that the current code does not work. > Remove the ipg clock code for now so that it's no longer in the way of > refactoring the driver. > > Signed-off-by: Sascha Hauer > Cc: Philipp Zabel I don't remember the details, but since I had only worked with i.MX53 and i.MX6 at the time, and Sascha now verified that the i.MX53 PWM registers can in fact be accessed with the pwmX_ipg_clk bits gated, I can only assume that this patch is the result of a misinterpretation of the i.MX53 technical reference manual: Contrary to the i.MX6 TRM it does not mention the ungated peripheral access clock (ipg_clk_s) at all, but calls the gated ipg_clk "block interface clock" in Table 18-3. Acked-by: Philipp Zabel regards Philipp