Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757279AbcKBSqi (ORCPT ); Wed, 2 Nov 2016 14:46:38 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34610 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757067AbcKBSqG (ORCPT ); Wed, 2 Nov 2016 14:46:06 -0400 From: =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Paolo Bonzini , Bandan Das , Nadav Amit Subject: [PATCH v2 2/4] KVM: x86: save one bit in ctxt->d Date: Wed, 2 Nov 2016 19:45:35 +0100 Message-Id: <20161102184537.29039-3-rkrcmar@redhat.com> In-Reply-To: <20161102184537.29039-1-rkrcmar@redhat.com> References: <20161102184537.29039-1-rkrcmar@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Wed, 02 Nov 2016 18:46:01 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2243 Lines: 64 Alignments are exclusive, so 5 modes can be expressed in 3 bits. Signed-off-by: Radim Krčmář --- arch/x86/kvm/emulate.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 557dbb9e5bec..18616b6bdebb 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -158,9 +158,11 @@ #define Src2GS (OpGS << Src2Shift) #define Src2Mask (OpMask << Src2Shift) #define Mmx ((u64)1 << 40) /* MMX Vector instruction */ +#define AlignMask ((u64)7 << 41) #define Aligned ((u64)1 << 41) /* Explicitly aligned (e.g. MOVDQA) */ -#define Unaligned ((u64)1 << 42) /* Explicitly unaligned (e.g. MOVDQU) */ -#define Avx ((u64)1 << 43) /* Advanced Vector Extensions */ +#define Unaligned ((u64)2 << 41) /* Explicitly unaligned (e.g. MOVDQU) */ +#define Avx ((u64)3 << 41) /* Advanced Vector Extensions */ +#define Aligned16 ((u64)4 << 41) /* Aligned to 16 byte boundary (e.g. FXSAVE) */ #define Fastop ((u64)1 << 44) /* Use opcode::u.fastop */ #define NoWrite ((u64)1 << 45) /* No writeback */ #define SrcWrite ((u64)1 << 46) /* Write back src operand */ @@ -171,7 +173,6 @@ #define NearBranch ((u64)1 << 52) /* Near branches */ #define No16 ((u64)1 << 53) /* No 16 bit operand */ #define IncSP ((u64)1 << 54) /* SP is incremented before ModRM calc */ -#define Aligned16 ((u64)1 << 55) /* Aligned to 16 byte boundary (e.g. FXSAVE) */ #define DstXacc (DstAccLo | SrcAccHi | SrcWrite) @@ -638,19 +639,21 @@ static void set_segment_selector(struct x86_emulate_ctxt *ctxt, u16 selector, */ static unsigned insn_alignment(struct x86_emulate_ctxt *ctxt, unsigned size) { + u64 alignment = ctxt->d & AlignMask; + if (likely(size < 16)) return 1; - if (ctxt->d & Aligned) - return size; - else if (ctxt->d & Unaligned) + switch (alignment) { + case Unaligned: + case Avx: return 1; - else if (ctxt->d & Avx) - return 1; - else if (ctxt->d & Aligned16) + case Aligned16: return 16; - else + case Aligned: + default: return size; + } } static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt, -- 2.10.1