Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754299AbcKCHXM (ORCPT ); Thu, 3 Nov 2016 03:23:12 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:53313 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752363AbcKCHXJ (ORCPT ); Thu, 3 Nov 2016 03:23:09 -0400 From: Hemant Kumar To: linux-kernel@vger.kernel.org Cc: maddy@linux.vnet.ibm.com, mpe@ellerman.id.au, benh@kernel.crashing.org, paulus@samba.org, anton@samba.org, sukadev@linux.vnet.ibm.com, mikey@neuling.org, stewart@linux.vnet.ibm.com, eranian@google.com, Hemant Kumar Subject: [PATCH 1/6] powerpc/powernv: Data structure and macros definitions Date: Thu, 3 Nov 2016 12:52:30 +0530 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478157755-14636-1-git-send-email-hemant@linux.vnet.ibm.com> References: <1478157755-14636-1-git-send-email-hemant@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16110307-0016-0000-0000-000001E6B230 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16110307-0017-0000-0000-000005C2C369 Message-Id: <1478157755-14636-2-git-send-email-hemant@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-11-03_02:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1611030137 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2729 Lines: 99 Create new header file "ima-pmu.h" to add the data structures and macros needed for IMA pmu support. Cc: Madhavan Srinivasan Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Michael Neuling Cc: Stewart Smith Cc: Stephane Eranian Signed-off-by: Hemant Kumar --- arch/powerpc/include/asm/ima-pmu.h | 73 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 arch/powerpc/include/asm/ima-pmu.h diff --git a/arch/powerpc/include/asm/ima-pmu.h b/arch/powerpc/include/asm/ima-pmu.h new file mode 100644 index 0000000..0ed8886 --- /dev/null +++ b/arch/powerpc/include/asm/ima-pmu.h @@ -0,0 +1,73 @@ +#ifndef PPC_POWERNV_IMA_PMU_DEF_H +#define PPC_POWERNV_IMA_PMU_DEF_H + +/* + * Nest Performance Monitor counter support. + * + * Copyright (C) 2016 Madhavan Srinivasan, IBM Corporation. + * (C) 2016 Hemant K Shaw, IBM Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#define IMA_MAX_CHIPS 32 +#define IMA_MAX_PMUS 32 +#define IMA_MAX_PMU_NAME_LEN 256 + +#define NEST_IMA_ENGINE_START 1 +#define NEST_IMA_ENGINE_STOP 0 +#define NEST_MAX_PAGES 16 + +#define NEST_IMA_PRODUCTION_MODE 1 + +#define IMA_DTB_COMPAT "ibm,opal-in-memory-counters" +#define IMA_DTB_NEST_COMPAT "ibm,ima-counters-chip" + +/* + * Structure to hold per chip specific memory address + * information for nest pmus. Nest Counter data are exported + * in per-chip reserved memory region by the PORE Engine. + */ +struct perchip_nest_info { + u32 chip_id; + u64 pbase; + u64 vbase[NEST_MAX_PAGES]; + u64 size; +}; + +/* + * Place holder for nest pmu events and values. + */ +struct ima_events { + char *ev_name; + char *ev_value; +}; + +/* + * Device tree parser code detects IMA pmu support and + * registers new IMA pmus. This structure will + * hold the pmu functions and attrs for each ima pmu and + * will be referenced at the time of pmu registration. + */ +struct ima_pmu { + struct pmu pmu; + int domain; + const struct attribute_group *attr_groups[4]; +}; + +/* + * Domains for IMA PMUs + */ +#define IMA_DOMAIN_NEST 1 + +#define UNKNOWN_DOMAIN -1 + +#endif /* PPC_POWERNV_IMA_PMU_DEF_H */ -- 2.7.4