Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758116AbcKCOzI (ORCPT ); Thu, 3 Nov 2016 10:55:08 -0400 Received: from mx2.suse.de ([195.135.220.15]:38452 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758110AbcKCOyw (ORCPT ); Thu, 3 Nov 2016 10:54:52 -0400 Date: Thu, 3 Nov 2016 15:54:46 +0100 From: Borislav Petkov To: Grzegorz Andrejczuk Cc: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, dave.hansen@linux.intel.com, lukasz.daniluk@intel.com, james.h.cownie@intel.com, jacob.jun.pan@intel.com, Piotr.Luc@intel.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH v8: 1/4] x86/msr: Add MSR_MISC_FEATURE_ENABLES and PHIR3MWAIT bit Message-ID: <20161103145446.cwcljsbwhc2nvhs2@pd.tnic> References: <1477995290-25079-1-git-send-email-grzegorz.andrejczuk@intel.com> <1477995290-25079-2-git-send-email-grzegorz.andrejczuk@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1477995290-25079-2-git-send-email-grzegorz.andrejczuk@intel.com> User-Agent: NeoMutt/20161014 (1.7.1) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1397 Lines: 35 On Tue, Nov 01, 2016 at 11:14:47AM +0100, Grzegorz Andrejczuk wrote: > Intel Xeon Phi x200 (codenamed Knights Landing) allows to enable > MONITOR and MWAIT instructions outside of ring 0. > > The feature is controlled by MSR MISC_FEATURE_ENABLES (0x140). > Setting bit 1 of this register enables it, so MONITOR and MWAIT > instructions do not cause invalid-opcode exceptions when invoked > outside of ring 0. > The feature MSR is not yet documented in the SDM. Here is > the relevant documentation: > > Hex Dec Name Scope > 140H 320 MISC_FEATURE_ENABLES Thread > 0 Reserved > 1 if set to 1, the MONITOR and MWAIT instructions do not > cause invalid-opcode exceptions when executed with CPL > 0 > or in virtual-8086 mode. If MWAIT is executed when CPL > 0 > or in virtual-8086 mode, and if EAX indicates a C-state > other than C0 or C1, the instruction operates as if EAX > indicated the C-state C1. > 63:2 Reserved > > Signed-off-by: Grzegorz Andrejczuk > --- > arch/x86/include/asm/msr-index.h | 5 +++++ > 1 file changed, 5 insertions(+) Reviewed-by: Borislav Petkov -- Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg) --