Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934041AbcKDFvn (ORCPT ); Fri, 4 Nov 2016 01:51:43 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:24099 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S933422AbcKDFvl (ORCPT ); Fri, 4 Nov 2016 01:51:41 -0400 From: Rick Chang To: Hans Verkuil , Laurent Pinchart , Mauro Carvalho Chehab , Matthias Brugger CC: , , , , Minghsiu Tsai , Rick Chang Subject: [PATCH v3 3/3] arm: dts: mt2701: Add node for Mediatek JPEG Decoder Date: Fri, 4 Nov 2016 13:51:20 +0800 Message-ID: <1478238680-11310-4-git-send-email-rick.chang@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1478238680-11310-1-git-send-email-rick.chang@mediatek.com> References: <1478238680-11310-1-git-send-email-rick.chang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1325 Lines: 40 Signed-off-by: Rick Chang Signed-off-by: Minghsiu Tsai --- This patch depends on: CCF "Add clock support for Mediatek MT2701"[1] iommu and smi "Add the dtsi node of iommu and smi for mt2701"[2] [1] http://lists.infradead.org/pipermail/linux-mediatek/2016-October/007271.html [2] https://patchwork.kernel.org/patch/9164013/ --- arch/arm/boot/dts/mt2701.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 8f13c70..4dd5048 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -298,6 +298,20 @@ power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; }; + jpegdec: jpegdec@15004000 { + compatible = "mediatek,mt2701-jpgdec"; + reg = <0 0x15004000 0 0x1000>; + interrupts = ; + clocks = <&imgsys CLK_IMG_JPGDEC_SMI>, + <&imgsys CLK_IMG_JPGDEC>; + clock-names = "jpgdec-smi", + "jpgdec"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + mediatek,larb = <&larb2>; + iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, + <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; + }; + vdecsys: syscon@16000000 { compatible = "mediatek,mt2701-vdecsys", "syscon"; reg = <0 0x16000000 0 0x1000>; -- 1.9.1