Date: Sun, 6 Nov 2016 14:37:11 +0100
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Hao Zhang <hao5781286@gmail.com>
Cc: wens@csie.org, dan.j.williams@intel.com, vinod.koul@intel.com,
        dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 1/1] ARM: dmaengine: sun6i: share the dma driver with
 sun50i
Message-ID: <20161106133711.np2hm77myfd75sn2@lukather>
References: <20161105080548.GA32546@arx12>
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On Sat, Nov 05, 2016 at 04:05:48PM +0800, Hao Zhang wrote:
> Add soc a64 dma support.
>=20
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
>  drivers/dma/sun6i-dma.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>=20
> diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
> index 8346199..00fcfc7 100644
> --- a/drivers/dma/sun6i-dma.c
> +++ b/drivers/dma/sun6i-dma.c
> @@ -1028,11 +1028,23 @@ static struct sun6i_dma_config sun8i_h3_dma_cfg =
=3D {
>  	.nr_max_vchans   =3D 34,
>  };
> =20
> +/*
> + * The A64 has 8 physical channels, a maximum DRQ port id of 27,
> + * and a total of 38 usable source and destination endpoints.
> + */
> +
> +static struct sun6i_dma_config sun50i_a64_dma_cfg =3D {
> +	.nr_max_channels =3D 8,
> +	.nr_max_requests =3D 27,
> +	.nr_max_vchans   =3D 38,
> +};
> +
>  static const struct of_device_id sun6i_dma_match[] =3D {
>  	{ .compatible =3D "allwinner,sun6i-a31-dma", .data =3D &sun6i_a31_dma_c=
fg },
>  	{ .compatible =3D "allwinner,sun8i-a23-dma", .data =3D &sun8i_a23_dma_c=
fg },
>  	{ .compatible =3D "allwinner,sun8i-a83t-dma", .data =3D &sun8i_a83t_dma=
_cfg },
>  	{ .compatible =3D "allwinner,sun8i-h3-dma", .data =3D &sun8i_h3_dma_cfg=
 },
> +	{ .compatible =3D "allwinner,sun50i-a64-dma", .data =3D &sun50i_a64_dma=
_cfg },

You need to add that compatible to the DT binding documentation.

>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, sun6i_dma_match);
> @@ -1110,6 +1122,13 @@ static int sun6i_dma_probe(struct platform_device =
*pdev)
>  	sdc->slave.dst_addr_widths		=3D BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
>  						  BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
>  						  BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
> +
> +	if (of_device_is_compatible(pdev->dev.of_node,
> +				    "allwinner,sun50i-a64-dma")) {
> +		sdc->slave.src_addr_widths	|=3D BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> +		sdc->slave.dst_addr_widths	|=3D BIT(DMA_SLAVE_BUSWIDTH_8_BYTES);
> +	}
> +

You'll also need to change convert_buswidth, it will reject any width
higher than 4 bytes.

Maxime

--=20
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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