Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933240AbcKGSVR (ORCPT ); Mon, 7 Nov 2016 13:21:17 -0500 Received: from mail-out.m-online.net ([212.18.0.9]:60619 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932713AbcKGSVM (ORCPT ); Mon, 7 Nov 2016 13:21:12 -0500 X-Auth-Info: DZQAW6ksHnM7VLeclbco5OU6/hSTNtpPrztOFyq9VWM= Subject: Re: [PATCH v8 2/3] Documentation: Add binding document for Lattice iCE40 FPGA manager To: Joel Holdsworth , atull@opensource.altera.com, moritz.fischer@ettus.com, geert@linux-m68k.org, robh@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, clifford@clifford.at References: <1478486962-26794-1-git-send-email-joel@airwebreathe.org.uk> <1478486962-26794-2-git-send-email-joel@airwebreathe.org.uk> From: Marek Vasut Message-ID: <7876f66a-f8c2-409b-0f18-e8055ddc7784@denx.de> Date: Mon, 7 Nov 2016 18:53:39 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Icedove/45.4.0 MIME-Version: 1.0 In-Reply-To: <1478486962-26794-2-git-send-email-joel@airwebreathe.org.uk> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1729 Lines: 48 On 11/07/2016 03:49 AM, Joel Holdsworth wrote: > This adds documentation of the device tree bindings of the Lattice iCE40 > FPGA driver for the FPGA manager framework. > > Signed-off-by: Joel Holdsworth > --- > .../bindings/fpga/lattice-ice40-fpga-mgr.txt | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > create mode 100644 Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt > > diff --git a/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt > new file mode 100644 > index 0000000..7e7a78b > --- /dev/null > +++ b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt > @@ -0,0 +1,21 @@ > +Lattice iCE40 FPGA Manager > + > +Required properties: > +- compatible: Should contain "lattice,ice40-fpga-mgr" > +- reg: SPI chip select > +- spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000) > +- cdone-gpios: GPIO input connected to CDONE pin > +- reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note > + that unless the GPIO is held low during startup, the > + FPGA will enter Master SPI mode and drive SCK with a > + clock signal potentially jamming other devices on the > + bus until the firmware is loaded. > + > +Example: > + ice40: ice40@0 { > + compatible = "lattice,ice40-fpga-mgr"; > + reg = <0>; > + spi-max-frequency = <1000000>; > + cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; > + reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; Wouldn't it make more sense to have "gpios" and "gpio-names" ? That scales better imo, although in this case we cannot really talk about scaling. > + }; > -- Best regards, Marek Vasut