Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932790AbcKINWg (ORCPT ); Wed, 9 Nov 2016 08:22:36 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:35540 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932212AbcKINWd (ORCPT ); Wed, 9 Nov 2016 08:22:33 -0500 From: Caesar Wang To: Heiko Stuebner Cc: eddie.cai@rock-chips.com, tfiga@chromium.org, Ziyuan Xu , Elaine Zhang , Caesar Wang , Douglas Anderson , David Wu , Jianqun Xu , Yakir Yang , Brian Norris , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Will Deacon , Mark Rutland , Catalin Marinas , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/9] arm64: dts: rockchip: add eMMC's power domain support for rk3399 Date: Wed, 9 Nov 2016 21:21:53 +0800 Message-Id: <1478697721-2323-2-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478697721-2323-1-git-send-email-wxt@rock-chips.com> References: <1478697721-2323-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1410 Lines: 54 From: Ziyuan Xu Control power domain for eMMC via genpd to reduce power consumption. Signed-off-by: Elaine Zhang Signed-off-by: Ziyuan Xu Signed-off-by: Caesar Wang --- Changes in v2: - Reviewed-on: https://chromium-review.googlesource.com/376558 - Verified on ChromeOS kernel4.4 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index cbb7f8b..b401176 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -269,6 +269,7 @@ #clock-cells = <0>; phys = <&emmc_phy>; phy-names = "phy_arasan"; + power-domains = <&power RK3399_PD_EMMC>; status = "disabled"; }; @@ -690,6 +691,11 @@ status = "disabled"; }; + qos_emmc: qos@ffa58000 { + compatible = "syscon"; + reg = <0x0 0xffa58000 0x0 0x20>; + }; + qos_gmac: qos@ffa5c000 { compatible = "syscon"; reg = <0x0 0xffa5c000 0x0 0x20>; @@ -823,6 +829,11 @@ }; /* These power domains are grouped by VD_LOGIC */ + pd_emmc@RK3399_PD_EMMC { + reg = ; + clocks = <&cru ACLK_EMMC>; + pm_qos = <&qos_emmc>; + }; pd_gmac@RK3399_PD_GMAC { reg = ; clocks = <&cru ACLK_GMAC>; -- 2.7.4