Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933305AbcKIOwF convert rfc822-to-8bit (ORCPT ); Wed, 9 Nov 2016 09:52:05 -0500 Received: from lhrrgout.huawei.com ([194.213.3.17]:4128 "EHLO lhrrgout.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932167AbcKIOwD (ORCPT ); Wed, 9 Nov 2016 09:52:03 -0500 From: Gabriele Paoloni To: One Thousand Gnomes , Arnd Bergmann CC: Mark Rutland , Yuanzhichang , "catalin.marinas@arm.com" , "will.deacon@arm.com" , "robh+dt@kernel.org" , "bhelgaas@google.com" , "olof@lixom.net" , "linux-arm-kernel@lists.infradead.org" , "lorenzo.pieralisi@arm.com" , "linux-kernel@vger.kernel.org" , Linuxarm , "devicetree@vger.kernel.org" , "linux-pci@vger.kernel.org" , "linux-serial@vger.kernel.org" , "minyard@acm.org" , "benh@kernel.crashing.org" , "liviu.dudau@arm.com" , "zourongrong@gmail.com" , John Garry , "zhichang.yuan02@gmail.com" , "kantyzc@163.com" , "xuwei (O)" , "marc.zyngier@arm.com" Subject: RE: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Thread-Topic: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA Thread-Index: AQHSOW8JPTYgJJB5M0qT6R8WGEEWR6DO+ZGAgABLcQCAAWnRgIAADwOg Date: Wed, 9 Nov 2016 14:51:01 +0000 Message-ID: References: <1478576829-112707-1-git-send-email-yuanzhichang@hisilicon.com> <1478576829-112707-3-git-send-email-yuanzhichang@hisilicon.com> <20161108114953.GB15297@leverpostej> <2368890.jTbyGqYR0M@wuerfel> <20161109135453.2e5402bd@lxorguk.ukuu.org.uk> In-Reply-To: <20161109135453.2e5402bd@lxorguk.ukuu.org.uk> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.203.181.158] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090206.582337DF.026C,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: fb6ecbf45212db6ead55d8625659061f Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1724 Lines: 46 > -----Original Message----- > From: One Thousand Gnomes [mailto:gnomes@lxorguk.ukuu.org.uk] > Sent: 09 November 2016 13:55 > To: Arnd Bergmann > Cc: Mark Rutland; Yuanzhichang; catalin.marinas@arm.com; > will.deacon@arm.com; robh+dt@kernel.org; bhelgaas@google.com; > olof@lixom.net; linux-arm-kernel@lists.infradead.org; > lorenzo.pieralisi@arm.com; linux-kernel@vger.kernel.org; Linuxarm; > devicetree@vger.kernel.org; linux-pci@vger.kernel.org; linux- > serial@vger.kernel.org; minyard@acm.org; benh@kernel.crashing.org; > liviu.dudau@arm.com; zourongrong@gmail.com; John Garry; Gabriele > Paoloni; zhichang.yuan02@gmail.com; kantyzc@163.com; xuwei (O); > marc.zyngier@arm.com > Subject: Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for > special ISA > > > I think it is a relatively safe assumption that there is only one > > ISA bridge. A lot of old drivers hardcode PIO or memory addresses > > It's not a safe assumption for x86 at least. There are a few systems > with > multiple ISA busses particularly older laptops with a docking station. Mmmm right...now the point is that this kind of special devices appearing as a special ISA bus will probably never appear on x86 platforms (I guess). So maybe it is a safe assumption because of this...? Thanks Gab > > > when talking to an ISA device, so having multiple instances is > > already problematic. > > PCMCIA devices handle it themselves so are ok. I'm not clear how the > dual > PIIX4 configuration used in the older IBM laptop docks actually worked > so > I assume the transaction went out of both bridges and providing one of > them responded the other kept silent as you simply stuffed the card > into > the dock and it worked. > > Alan