Subject: Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs
To: Joel Holdsworth <joel@airwebreathe.org.uk>,
        Moritz Fischer <moritz.fischer@ettus.com>
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Cc: Alan Tull <atull@opensource.altera.com>,
        Geert Uytterhoeven <geert@linux-m68k.org>,
        Rob Herring <robh@kernel.org>,
        Devicetree List <devicetree@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        linux-spi@vger.kernel.org, Clifford Wolf <clifford@clifford.at>
From: Marek Vasut <marex@denx.de>
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Date: Wed, 9 Nov 2016 13:01:56 +0100
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On 11/08/2016 06:30 PM, Joel Holdsworth wrote:
>>>> On the whole, I don't think the zero-length transfers are too
>>>> egregiously bad, and all the alternatives seem worse to me.
>>>
>>> So why not turn the CS line into GPIO and just toggle the GPIO?
>>
>> Does that work with *all* SPI controllers?
>>
> 
> It does not - no. See my other email.

And is that line an actual CS of that lattice chip or a generic input
which almost works like CS?

-- 
Best regards,
Marek Vasut