Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753125AbcKISh3 (ORCPT ); Wed, 9 Nov 2016 13:37:29 -0500 Received: from auth.a.painless.aa.net.uk ([90.155.4.51]:48627 "EHLO auth.a.painless.aa.net.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751537AbcKISh1 (ORCPT ); Wed, 9 Nov 2016 13:37:27 -0500 Subject: Re: [PATCH v8 3/3] fpga: Add support for Lattice iCE40 FPGAs To: Marek Vasut , Moritz Fischer References: <1478486962-26794-1-git-send-email-joel@airwebreathe.org.uk> <1478486962-26794-3-git-send-email-joel@airwebreathe.org.uk> <2255968d-b97c-2b9c-4e4d-7f3717a748e3@denx.de> <01d1a97b-2f43-49a6-51fb-e223ef4dce9b@airwebreathe.org.uk> <4bdba358-db18-48f1-3286-a7a7f4c30215@denx.de> Cc: Alan Tull , Geert Uytterhoeven , Rob Herring , Devicetree List , Linux Kernel Mailing List , linux-spi@vger.kernel.org, Clifford Wolf From: Joel Holdsworth Message-ID: <5828eb84-ab29-49e2-34f0-3cd7e527ca66@airwebreathe.org.uk> Date: Wed, 9 Nov 2016 11:37:08 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-Painless-Spam-Score: -0.2 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1190 Lines: 38 On 09/11/16 05:01, Marek Vasut wrote: > On 11/08/2016 06:30 PM, Joel Holdsworth wrote: >>>>> On the whole, I don't think the zero-length transfers are too >>>>> egregiously bad, and all the alternatives seem worse to me. >>>> >>>> So why not turn the CS line into GPIO and just toggle the GPIO? >>> >>> Does that work with *all* SPI controllers? >>> >> >> It does not - no. See my other email. > > And is that line an actual CS of that lattice chip or a generic input > which almost works like CS? > I mean a generic output vs. a special CS output built into the SPI master of the application processor. Take a look at how spi_set_cs(..) works: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/drivers/spi/spi.c?id=refs/tags/v4.9-rc4#n695 static void spi_set_cs(struct spi_device *spi, bool enable) { if (spi->mode & SPI_CS_HIGH) enable = !enable; if (gpio_is_valid(spi->cs_gpio)) gpio_set_value(spi->cs_gpio, !enable); else if (spi->master->set_cs) spi->master->set_cs(spi, !enable); } So on some SPI masters, spi->master->set_cs is handled separately from normal GPIOs. Hence why I want to use this machinery, rather than doing it with a GPIO. Joel