Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752796AbcKIVh0 (ORCPT ); Wed, 9 Nov 2016 16:37:26 -0500 Received: from mout.kundenserver.de ([212.227.126.135]:58842 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750927AbcKIVhX (ORCPT ); Wed, 9 Nov 2016 16:37:23 -0500 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: Gabriele Paoloni , Yuanzhichang , "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , "lorenzo.pieralisi@arm.com" , "benh@kernel.crashing.org" , "minyard@acm.org" , "catalin.marinas@arm.com" , John Garry , "will.deacon@arm.com" , "linux-kernel@vger.kernel.org" , "xuwei (O)" , Linuxarm , "olof@lixom.net" , "robh+dt@kernel.org" , "zourongrong@gmail.com" , "linux-serial@vger.kernel.org" , "linux-pci@vger.kernel.org" , "bhelgaas@google.com" , "liviu.dudau@arm.com" , "kantyzc@163.com" , "zhichang.yuan02@gmail.com" Subject: Re: [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06 Date: Wed, 09 Nov 2016 22:34:38 +0100 Message-ID: <2825537.ADCNsGqGxn@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-34-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: References: <1478576829-112707-1-git-send-email-yuanzhichang@hisilicon.com> <1555494.4IFvGxvsfe@wuerfel> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:pwrzHFBE7gW6cO4u/eVNk/lIuh4LT0bNDBFYuGrEJOjZ84D6ctm eBeIrbqAPIDwVF2YpLoelNTuQDdM17gw9hQypLqxqVK11VaBXLxac8d85iVRtpp0bpUad/m W6wGTfH3jLD4atPKVQzkKsMUpsU/sOLcH4vZptyv4VZm0F+uyTAmH0vloQFESqFycWZZWOC sAWhOUK9ZYHX+QXq0MdmA== X-UI-Out-Filterresults: notjunk:1;V01:K0:6wwACp5DMI8=:/E0RU34FuiCzoprYIrBwJN RFYd/kU7IpbkuePDnPll/h1TyCZ8kPr65bOw1RD/9kcm1VKiqJtiOzFkNCyXzUTR9R8oghAUV 5Q2gCo9l6Rh8GCls5tKdCfvyQyEJCF+VIGtj2IFA2qFRTI0gJIHFz3xKR540wdN1Is39pNm9i RDmdwnTH4hw3kXxOG7/T8eFKzJtYFlbSqcb0ifErjfEjI6r7hyqRuOu30X+nGlNYh/0gKjsfe lNpXZheyP26IHrvfQHWFlcQ5XFbXV8c+p/DI185ilX1ipV593na3tjl1LtTwVcHimug9YD1D/ tiJbbUOy4xJGHMUak48/yTJlJNW0MCXqFy9fAmZXvNUeGuRmczjN0zx5LvkZhC8Z9RlxB8U+G RNykwmfetKcxRhEPlhCzM3fSDXUo1ioV71KUFdyV2EnAqOmeQMhuUdsL1/nBQrE5X6JOFwHEn QYwIzxx27ZeLXjMUaoWAn302OKiit3CWztQCWl13MaTMgVxP6K+K05TgKxQXOB7NKRItP2MUS R4Fz/iIchcoHfQphKgRH3B1lepOHh6SY9KrAOaA8/8+AjsaU5ndxNAKsBZdomGyzRfzYTlj2H PzMtjlxUa9AEiJlUqQyRR/xneMWZtNLnPSVX7whELBeaf/XrXljj4/KbCGDG8/1aeu8nWzbGY bVQpHrdAWh2nX+QhndlCZgfC4B7T3NytTvRiirpvNC0cs/lulYh6hD0+VZWEmAGN638l6guDg MJIoFWZQny8R9ymW Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1579 Lines: 34 On Wednesday, November 9, 2016 12:10:43 PM CET Gabriele Paoloni wrote: > > On Tuesday, November 8, 2016 11:47:09 AM CET zhichang.yuan wrote: > > > + /* > > > + * The first PCIBIOS_MIN_IO is reserved specifically for > > indirectIO. > > > + * It will separate indirectIO range from pci host bridge to > > > + * avoid the possible PIO conflict. > > > + * Set the indirectIO range directly here. > > > + */ > > > + lpcdev->io_ops.start = 0; > > > + lpcdev->io_ops.end = PCIBIOS_MIN_IO - 1; > > > + lpcdev->io_ops.devpara = lpcdev; > > > + lpcdev->io_ops.pfin = hisilpc_comm_in; > > > + lpcdev->io_ops.pfout = hisilpc_comm_out; > > > + lpcdev->io_ops.pfins = hisilpc_comm_ins; > > > + lpcdev->io_ops.pfouts = hisilpc_comm_outs; > > > > I have to look at patch 2 in more detail again, after missing a few > > review > > rounds. I'm still a bit skeptical about hardcoding a logical I/O port > > range here, and would hope that we can just go through the same > > assignment of logical port ranges that we have for PCI buses, > > decoupling > > the bus addresses from the linux-internal ones. > > The point here is that we want to avoid any conflict/overlap between > the LPC I/O space and the PCI I/O space. With the assignment above > we make sure that LPC never interfere with PCI I/O space. But we already abstract the PCI I/O space using dynamic registration. There is no need to hardcode the logical address for ISA, though I think we can hardcode the bus address to start at zero here. Arnd