Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754926AbcKJJWU convert rfc822-to-8bit (ORCPT ); Thu, 10 Nov 2016 04:22:20 -0500 Received: from gloria.sntech.de ([95.129.55.99]:53688 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753880AbcKJJWP (ORCPT ); Thu, 10 Nov 2016 04:22:15 -0500 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: wlf Cc: Doug Anderson , Kishon Vijay Abraham I , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "open list:ARM/Rockchip SoC..." , "devicetree@vger.kernel.org" , Rob Herring , Frank Wang , =?utf-8?B?6buE5rab?= , Brian Norris , Guenter Roeck , Matthias Kaehlcke , linux-clk Subject: Re: [PATCH] phy: rockchip-inno-usb2: correct 480MHz output clock stable time Date: Thu, 10 Nov 2016 10:21:51 +0100 Message-ID: <2283070.Hkeafucara@diego> User-Agent: KMail/4.14.10 (Linux/4.6.0-1-amd64; KDE/4.14.22; x86_64; ; ) In-Reply-To: <9eeb3d84-f850-4b76-ce6a-67cc92d6de3b@rock-chips.com> References: <1478523658-9400-1-git-send-email-wulf@rock-chips.com> <9eeb3d84-f850-4b76-ce6a-67cc92d6de3b@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="utf-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2545 Lines: 67 Am Donnerstag, 10. November 2016, 10:54:49 schrieb wlf: > Hi Doug, > > 在 2016年11月10日 04:54, Doug Anderson 写道: > > Hi, > > > > On Mon, Nov 7, 2016 at 5:00 AM, William Wu wrote: > >> We found that the system crashed due to 480MHz output clock of > >> USB2 PHY was unstable after clock had been enabled by gpu module. > >> > >> Theoretically, 1 millisecond is a critical value for 480MHz > >> output clock stable time, so we try to change the delay time > >> to 1.2 millisecond to avoid this issue. > >> > >> Signed-off-by: William Wu > >> --- > >> > >> drivers/phy/phy-rockchip-inno-usb2.c | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/drivers/phy/phy-rockchip-inno-usb2.c > >> b/drivers/phy/phy-rockchip-inno-usb2.c index ecfd7d1..8f2d2b6 100644 > >> --- a/drivers/phy/phy-rockchip-inno-usb2.c > >> +++ b/drivers/phy/phy-rockchip-inno-usb2.c > >> @@ -267,7 +267,7 @@ static int rockchip_usb2phy_clk480m_enable(struct > >> clk_hw *hw)>> > >> return ret; > >> > >> /* waitting for the clk become stable */ > >> > >> - mdelay(1); > >> + udelay(1200); > > > > Several people who have seen this patch have expressed concern that a > > 1.2 ms delay is pretty long for something that's supposed to be > > "atomic" like a clk_enable(). Consider that someone might call > > clk_enable() while interrupts are disabled and that a 1.2 ms interrupt > > latency is not so great. > > > > It seems like this clock should be moved to be enabled in "prepare" > > and the "enable" should be a no-op. This is a functionality change, > > but I don't think there are any real users for this clock at the > > moment so it should be fine. > > > > (of course, the 1 ms latency that existed before this patch was still > > pretty bad, but ...) > > Thanks a lot for your suggestion. > I agree with you. clk_enable() will call spin_lock_irqsave() to disable > interrupt, and we add > more than 1ms in clk_enable may cause big latency. > > And according to clk_prepare() description: > In a simple case, clk_prepare can be used instead of clk_enable to > ungate a clk if the > operation may sleep. One example is a clk which is accessed over I2c. > > So maybe we can remove the clock to clk_prepare. > > Hi Heiko, Frank, > What do you think of it? moving to clk_prepare sounds sensible. That way you can switch from delay to sleep functions as well. Heiko