Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753332AbcKNIwQ (ORCPT ); Mon, 14 Nov 2016 03:52:16 -0500 Received: from mail-wm0-f47.google.com ([74.125.82.47]:37762 "EHLO mail-wm0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752040AbcKNIwP (ORCPT ); Mon, 14 Nov 2016 03:52:15 -0500 Date: Mon, 14 Nov 2016 09:43:10 +0100 From: Daniel Lezcano To: Noam Camus Cc: robh+dt@kernel.org, mark.rutland@arm.com, tglx@linutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/3] clocksource: update "fn" at CLOCKSOURCE_OF_DECLARE() of nps400 timer Message-ID: <20161114084310.GB2016@mai> References: <1479021872-14237-1-git-send-email-noamca@mellanox.com> <1479021872-14237-3-git-send-email-noamca@mellanox.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1479021872-14237-3-git-send-email-noamca@mellanox.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3927 Lines: 137 On Sun, Nov 13, 2016 at 09:24:31AM +0200, Noam Camus wrote: > From: Noam Camus > > nps_setup_clocksource() should take node as only argument i.e.: > replace > int __init nps_setup_clocksource(struct device_node *node, struct clk *clk) > with > int __init nps_setup_clocksource(struct device_node *node) because ... > This is also serve as preperation for next patch which adds support s/This is also/This also/ s/preperation/preparation/ > for clockevents to nps400. > Specifically we add new function nps_get_timer_clk() to serve clocksource > and later clockevent registration. > > Signed-off-by: Noam Camus > --- > drivers/clocksource/timer-nps.c | 63 +++++++++++++++++++++++---------------- > 1 files changed, 37 insertions(+), 26 deletions(-) > > diff --git a/drivers/clocksource/timer-nps.c b/drivers/clocksource/timer-nps.c > index 70c149a..eeef9e9 100644 > --- a/drivers/clocksource/timer-nps.c > +++ b/drivers/clocksource/timer-nps.c > @@ -46,7 +46,33 @@ > /* This array is per cluster of CPUs (Each NPS400 cluster got 256 CPUs) */ > static void *nps_msu_reg_low_addr[NPS_CLUSTER_NUM] __read_mostly; > > -static unsigned long nps_timer_rate; > +static int __init nps_get_timer_clk(struct device_node *node, > + unsigned long *timer_freq, > + struct clk **clk) > +{ > + int ret; > + > + *clk = of_clk_get(node, 0); > + if (IS_ERR(*clk)) { > + pr_err("timer missing clk"); > + return PTR_ERR(*clk); > + } > + > + ret = clk_prepare_enable(*clk); > + if (ret) { > + pr_err("Couldn't enable parent clk\n"); > + return ret; > + } > + > + *timer_freq = clk_get_rate(*clk); > + if (!(*timer_freq)) { > + pr_err("Couldn't get clk rate\n"); > + clk_disable_unprepare(*clk); > + return 1; s/return 1/return -EINVAL/ What about clk_put() ? > + } > + > + return 0; > +} > > static cycle_t nps_clksrc_read(struct clocksource *clksrc) > { > @@ -55,26 +81,24 @@ static cycle_t nps_clksrc_read(struct clocksource *clksrc) > return (cycle_t)ioread32be(nps_msu_reg_low_addr[cluster]); > } > > -static int __init nps_setup_clocksource(struct device_node *node, > - struct clk *clk) > +static int __init nps_setup_clocksource(struct device_node *node) > { > int ret, cluster; > + struct clk *clk; > + unsigned long nps_timer1_freq; > + > > for (cluster = 0; cluster < NPS_CLUSTER_NUM; cluster++) > nps_msu_reg_low_addr[cluster] = > nps_host_reg((cluster << NPS_CLUSTER_OFFSET), > - NPS_MSU_BLKID, NPS_MSU_TICK_LOW); > + NPS_MSU_BLKID, NPS_MSU_TICK_LOW); > > - ret = clk_prepare_enable(clk); > - if (ret) { > - pr_err("Couldn't enable parent clock\n"); > + ret = nps_get_timer_clk(node, &nps_timer1_freq, &clk); > + if (ret) > return ret; > - } > > - nps_timer_rate = clk_get_rate(clk); > - > - ret = clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick", > - nps_timer_rate, 301, 32, nps_clksrc_read); > + ret = clocksource_mmio_init(nps_msu_reg_low_addr, "nps-tick", > + nps_timer1_freq, 300, 32, nps_clksrc_read); > if (ret) { > pr_err("Couldn't register clock source.\n"); > clk_disable_unprepare(clk); > @@ -83,18 +107,5 @@ static int __init nps_setup_clocksource(struct device_node *node, > return ret; > } > > -static int __init nps_timer_init(struct device_node *node) > -{ > - struct clk *clk; > - > - clk = of_clk_get(node, 0); > - if (IS_ERR(clk)) { > - pr_err("Can't get timer clock.\n"); > - return PTR_ERR(clk); > - } > - > - return nps_setup_clocksource(node, clk); > -} > - > CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer", > - nps_timer_init); > + nps_setup_clocksource); > -- > 1.7.1 > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog