Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934956AbcKNRPs (ORCPT ); Mon, 14 Nov 2016 12:15:48 -0500 Received: from mail-bl2nam02on0083.outbound.protection.outlook.com ([104.47.38.83]:26304 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S934090AbcKNRPm (ORCPT ); Mon, 14 Nov 2016 12:15:42 -0500 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Thomas.Lendacky@amd.com; Subject: Re: [RFC PATCH v3 01/20] x86: Documentation for AMD Secure Memory Encryption (SME) To: Borislav Petkov References: <20161110003426.3280.2999.stgit@tlendack-t1.amdoffice.net> <20161110003439.3280.82634.stgit@tlendack-t1.amdoffice.net> <20161110105114.oiwcgpb436dxrdpb@pd.tnic> CC: , , , , , , , , , Rik van Riel , =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , Arnd Bergmann , Jonathan Corbet , Matt Fleming , Joerg Roedel , Konrad Rzeszutek Wilk , Paolo Bonzini , Larry Woodman , Ingo Molnar , Andy Lutomirski , "H. Peter Anvin" , Andrey Ryabinin , Alexander Potapenko , Thomas Gleixner , Dmitry Vyukov From: Tom Lendacky Message-ID: <0a4fd80a-c3ec-5cb3-6996-bb1562c1bf58@amd.com> Date: Mon, 14 Nov 2016 11:15:23 -0600 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <20161110105114.oiwcgpb436dxrdpb@pd.tnic> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: BY2PR1001CA0077.namprd10.prod.outlook.com (10.164.163.45) To CY4PR12MB1141.namprd12.prod.outlook.com (10.168.163.149) X-Microsoft-Exchange-Diagnostics: 1;CY4PR12MB1141;2:Mw7XIYKTCE7voj7Ks6DbrZx/E5Dok7kdN33RMr0fkJGBcGLEDLaT02iSN8K8yvYAWVuvrc0BxMZHcGXQSwxUuNyarlG/NnLyd5Phihq0u2/knXm3zdKnpd751WarUIOVpVQKLOU/KrbuD2ZwvOvoOHC+ZgL8mJbpb8I4k+o1f84=;3:2fftmUxcZzCKH9J6iP8j7KZ9YMKZok+Mgx5BedBA+N5FMWUFRGidujnKldiitr4bfAmXzfVVcqnukwuq0jpc8QpUzoVjkWtxSMBZoQFd4Pf64V3QiGaZjJKLQlO3AlWoOM/fPKY0tlQq+mtUMntutVkINNoMlQ4G+22ELa4G/2A=;25:RNeBmlXzhLn1NhOeFZgmF4YyqHJikZjbrp1HZECUU2jGhvMa/hCr0NKQx0DaQwkLMRz2jpZ7TIxWSGMS5Osah6B1idDyX8M1kjDdqJW6xP70Qz1CbJO49SrW/hJf/JgM3+Q9VVkvKv3DRFvdh+9mKxaTwNIAqTEEplSK7VHPNYci9U1ab0FFgqVnSvrLeOJCnUtaX7YBL0XciH/yVOKh1QeDtnx21PP3C41EtoGTxcUMgzSjjV66e7hWCow/GYa5rQ2c7ssZR2rJu5JQLdpHj/BcOzo28p4EZicRumbclm58xxHjgJbS7Kl+rROj0/nfmfM8uf9Sn9gUTw1Nd3udyaF/kiRnkFPGc2US4CccBm0N7kitgsvY9/lj//jjYCD51FyJ380waxruVqW5clITcDLz7Ys7QMoHGSbaBILLScsdANMtIngkdMNNkzsWtVYr X-MS-Office365-Filtering-Correlation-Id: 14ff3e9e-58ed-4baf-57b7-08d40cb1d900 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001);SRVR:CY4PR12MB1141; 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Such letter suffixes can also be entirely omitted. >> memory contents and reserves bad memory >> regions that are detected. >> >> + mem_encrypt= [X86-64] Enable AMD Secure Memory Encryption (SME) >> + Memory encryption is disabled by default, using this >> + switch, memory encryption can be enabled. > > I'd say here: > > "Force-enable memory encryption if it is disabled in the > BIOS." Good suggestion, that will make this clearer. > >> + on: enable memory encryption >> + >> meye.*= [HW] Set MotionEye Camera parameters >> See Documentation/video4linux/meye.txt. >> >> diff --git a/Documentation/x86/amd-memory-encryption.txt b/Documentation/x86/amd-memory-encryption.txt >> new file mode 100644 >> index 0000000..788d871 >> --- /dev/null >> +++ b/Documentation/x86/amd-memory-encryption.txt >> @@ -0,0 +1,40 @@ >> +Secure Memory Encryption (SME) is a feature found on AMD processors. >> + >> +SME provides the ability to mark individual pages of memory as encrypted using >> +the standard x86 page tables. A page that is marked encrypted will be >> +automatically decrypted when read from DRAM and encrypted when written to >> +DRAM. SME can therefore be used to protect the contents of DRAM from physical >> +attacks on the system. >> + >> +A page is encrypted when a page table entry has the encryption bit set (see >> +below how to determine the position of the bit). The encryption bit can be >> +specified in the cr3 register, allowing the PGD table to be encrypted. Each >> +successive level of page tables can also be encrypted. >> + >> +Support for SME can be determined through the CPUID instruction. The CPUID >> +function 0x8000001f reports information related to SME: >> + >> + 0x8000001f[eax]: >> + Bit[0] indicates support for SME >> + 0x8000001f[ebx]: >> + Bit[5:0] pagetable bit number used to enable memory encryption >> + Bit[11:6] reduction in physical address space, in bits, when >> + memory encryption is enabled (this only affects system >> + physical addresses, not guest physical addresses) >> + >> +If support for SME is present, MSR 0xc00100010 (SYS_CFG) can be used to >> +determine if SME is enabled and/or to enable memory encryption: >> + >> + 0xc0010010: >> + Bit[23] 0 = memory encryption features are disabled >> + 1 = memory encryption features are enabled >> + >> +Linux relies on BIOS to set this bit if BIOS has determined that the reduction >> +in the physical address space as a result of enabling memory encryption (see >> +CPUID information above) will not conflict with the address space resource >> +requirements for the system. If this bit is not set upon Linux startup then >> +Linux itself will not set it and memory encryption will not be possible. >> + >> +SME support is configurable through the AMD_MEM_ENCRYPT config option. >> +Additionally, the mem_encrypt=on command line parameter is required to activate >> +memory encryption. > > So how am I to understand this? We won't have TSME or we will but it > will be off by default and users will have to enable it in the BIOS or > will have to boot with mem_encrypt=on...? > > Can you please expand on all the possible options there would be > available to users? Yup, I'll try to expand on the documentation to include all the possibilities for this. Thanks, Tom >