Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S938987AbcKOCVO (ORCPT ); Mon, 14 Nov 2016 21:21:14 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:60978 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932343AbcKOCVM (ORCPT ); Mon, 14 Nov 2016 21:21:12 -0500 DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 630BA6029D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=sboyd@codeaurora.org Date: Mon, 14 Nov 2016 18:21:10 -0800 From: Stephen Boyd To: Jiancheng Xue Cc: mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, yanhaifeng@hisilicon.com, wenpan@hisilicon.com, howell.yang@hisilicon.com, qinxiaojun@huawei.com Subject: Re: [RESEND 2/2] clk: hisilicon: add CRG driver for Hi3516CV300 SoC Message-ID: <20161115022110.GS5177@codeaurora.org> References: <1479091794-1145-1-git-send-email-xuejiancheng@hisilicon.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1479091794-1145-1-git-send-email-xuejiancheng@hisilicon.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 470 Lines: 14 On 11/14, Jiancheng Xue wrote: > Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset > Generator) module generates clock and reset signals used > by other module blocks on SoC. > > Signed-off-by: Pan Wen > Signed-off-by: Jiancheng Xue > --- Applied to clk-next + fixed the authorship to be Pan Wen. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project