Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965727AbcKODXp (ORCPT ); Mon, 14 Nov 2016 22:23:45 -0500 Received: from regular1.263xmail.com ([211.150.99.133]:43049 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933542AbcKODXm (ORCPT ); Mon, 14 Nov 2016 22:23:42 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: wulf@rock-chips.com X-FST-TO: groeck@google.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: wulf@rock-chips.com X-UNIQUE-TAG: <91b13556fcdadc6bde388f15b59c2e1b> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v3 2/2] phy: rockchip-inno-usb2: correct 480MHz output clock stable time To: Doug Anderson References: <1479115631-20137-1-git-send-email-wulf@rock-chips.com> <1479115631-20137-3-git-send-email-wulf@rock-chips.com> Cc: Kishon Vijay Abraham I , =?UTF-8?Q?Heiko_St=c3=bcbner?= , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "open list:ARM/Rockchip SoC..." , "devicetree@vger.kernel.org" , Rob Herring , Frank Wang , =?UTF-8?B?6buE5rab?= , Brian Norris , Guenter Roeck From: wlf Message-ID: <4919785a-2460-145d-e2e4-944ae7940633@rock-chips.com> Date: Tue, 15 Nov 2016 11:23:26 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1755 Lines: 49 Hi Doug, 在 2016年11月15日 02:17, Doug Anderson 写道: > William, > > On Mon, Nov 14, 2016 at 1:27 AM, William Wu wrote: >> We found that the system crashed due to 480MHz output clock of >> USB2 PHY was unstable after clock had been enabled by gpu module. >> >> Theoretically, 1 millisecond is a critical value for 480MHz >> output clock stable time, so we try to change the delay time >> to 1.2 millisecond to avoid this issue. >> >> And the commit ed907fb1d7c3 ("phy: rockchip-inno-usb2: correct >> clk_ops callback") used prepare callbacks instead of enable >> callbacks to support gate a clk if the operation may sleep. So >> we can switch from delay to sleep functions. >> >> Signed-off-by: William Wu >> --- >> Changes in v3: >> - fix kbuild test error: too few arguments to function 'usleep_range' >> >> Changes in v2: >> - use usleep_range() function instead of mdelay() >> >> drivers/phy/phy-rockchip-inno-usb2.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/phy/phy-rockchip-inno-usb2.c b/drivers/phy/phy-rockchip-inno-usb2.c >> index 365e077..0e52b25 100644 >> --- a/drivers/phy/phy-rockchip-inno-usb2.c >> +++ b/drivers/phy/phy-rockchip-inno-usb2.c >> @@ -166,7 +166,7 @@ static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw) >> return ret; >> >> /* waitting for the clk become stable */ >> - mdelay(1); >> + usleep_range(1200, 1300); > Sight nit that you could also fix the spelling from "waitting" to "waiting". > > ...but that's pre-existing, so: > > Reviewed-by: Douglas Anderson Thanks! I'll add Reviewed-by and fix the spelling issue. > > >