Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752883AbcKONBS (ORCPT ); Tue, 15 Nov 2016 08:01:18 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:60202 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752488AbcKONBN (ORCPT ); Tue, 15 Nov 2016 08:01:13 -0500 Subject: Re: [PATCH v4 0/2] phy: rockchip-inno-usb2: correct 480MHz clk_ops callbacks and stable time To: William Wu , References: <1479182047-3399-1-git-send-email-wulf@rock-chips.com> CC: , , , , , , , , , From: Kishon Vijay Abraham I Message-ID: <582B06EB.1050700@ti.com> Date: Tue, 15 Nov 2016 18:30:27 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <1479182047-3399-1-git-send-email-wulf@rock-chips.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 572 Lines: 21 On Tuesday 15 November 2016 09:24 AM, William Wu wrote: > This series try to correct the 480MHz output clock of USB2 PHY > clk_ops callback and fix the delay time. It aims to make the > 480MHz clock gate more sensible and stable. > > Tested on rk3366/rk3399 EVB board. merged to phy -next. Thanks Kishon > > William Wu (2): > phy: rockchip-inno-usb2: correct clk_ops callback > phy: rockchip-inno-usb2: correct 480MHz output clock stable time > > drivers/phy/phy-rockchip-inno-usb2.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) >