Subject: Re: [PATCH v5 2/4] phy: da8xx-usb: Configure CFGCHIP2 to support OTG
 workaround
To: Alexandre Bailon <abailon@baylibre.com>, <david@lechnology.com>,
        <b-liu@ti.com>, <balbi@kernel.org>
References: <1478523908-4383-1-git-send-email-abailon@baylibre.com>
 <1478523908-4383-3-git-send-email-abailon@baylibre.com>
CC: <khilman@baylibre.com>, <linux-kernel@vger.kernel.org>,
        <linux-usb@vger.kernel.org>, <nsekhar@ti.com>
From: Kishon Vijay Abraham I <kishon@ti.com>
Message-ID: <582B09AB.1080309@ti.com>
Date: Tue, 15 Nov 2016 18:42:11 +0530
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On Monday 07 November 2016 06:35 PM, Alexandre Bailon wrote:
> If we configure the da8xx OTG phy in OTG mode, neither device or host
> mode will work. That is because the PHY is not able to detect and notify
> the driver that value of ID pin changed.
> To work despite this hardware limitation, the da8xx glue implement a
> workaround.
> But to work, the workaround require the VBUS sense and the session end
> comparator to enabled.
> Enable them if the phy is configured in OTG mode.
> 
> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>

merged this to phy -next.

Thanks
Kishon
> ---
>  drivers/phy/phy-da8xx-usb.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c
> index 32ae78c..089c13b 100644
> --- a/drivers/phy/phy-da8xx-usb.c
> +++ b/drivers/phy/phy-da8xx-usb.c
> @@ -23,6 +23,8 @@
>  #include <linux/platform_device.h>
>  #include <linux/regmap.h>
>  
> +#define PHY_INIT_BITS	(CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN)
> +
>  struct da8xx_usb_phy {
>  	struct phy_provider	*phy_provider;
>  	struct phy		*usb11_phy;
> @@ -207,6 +209,9 @@ static int da8xx_usb_phy_probe(struct platform_device *pdev)
>  			dev_warn(dev, "Failed to create usb20 phy lookup\n");
>  	}
>  
> +	regmap_write_bits(d_phy->regmap, CFGCHIP(2),
> +			  PHY_INIT_BITS, PHY_INIT_BITS);
> +
>  	return 0;
>  }
>  
>