Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932951AbcKOUVW (ORCPT ); Tue, 15 Nov 2016 15:21:22 -0500 Received: from mga14.intel.com ([192.55.52.115]:54771 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753205AbcKOUVQ (ORCPT ); Tue, 15 Nov 2016 15:21:16 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,496,1473145200"; d="scan'208";a="786813653" From: Bin Gao To: Thomas Gleixner Cc: Ingo Molnar , H Peter Anvin , x86@kernel.org, Peter Zijlstra , linux-kernel@vger.kernel.org, Bin Gao Subject: [PATCH 4/4] x86/tsc: set TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Atom SoCs Date: Tue, 15 Nov 2016 12:27:24 -0800 Message-Id: <1479241644-234277-5-git-send-email-bin.gao@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1479241644-234277-1-git-send-email-bin.gao@linux.intel.com> References: <1479241644-234277-1-git-send-email-bin.gao@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3112 Lines: 84 TSC on Intel Atom SoCs capable of determining TSC frequency by MSR is reliable and the frequency is known (because it's provided by HW). On these platforms PIT/HPET is generally not available so calibration won't work at all and also TSC is the only reliable clocksource. So we set both X86_FEATURE_TSC_KNOWN_FREQ and X86_FEATURE_TSC_RELIABLE flags to make sure the calibration is skipped and no watchdog on TSC. Signed-off-by: Bin Gao --- arch/x86/kernel/tsc_msr.c | 18 ++++++++++++++++++ arch/x86/platform/intel-mid/mfld.c | 9 +++++++-- arch/x86/platform/intel-mid/mrfld.c | 8 ++++++-- 3 files changed, 31 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c index 0fe720d..c0f137c 100644 --- a/arch/x86/kernel/tsc_msr.c +++ b/arch/x86/kernel/tsc_msr.c @@ -100,5 +100,23 @@ unsigned long cpu_khz_from_msr(void) #ifdef CONFIG_X86_LOCAL_APIC lapic_timer_frequency = (freq * 1000) / HZ; #endif + + /* + * TSC frequency determined by MSR is always considered "known" + * because it is reported by HW. + * Another fact is that on MSR capable platforms, PIT/HPET is + * generally not available so calibration won't work at all. + */ + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + + /* + * Unfortunately there is no a HW way to report TSC is reliable. + * We were told by silicon design team that TSC on Atom SoCs are + * always "reliable". TSC is also the only reliable clocksource + * on these SoCs (HPET is either not present or not functional) + * so marke TSC reliable to avoid watchdog on it. + */ + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + return res; } diff --git a/arch/x86/platform/intel-mid/mfld.c b/arch/x86/platform/intel-mid/mfld.c index 1eb47b6..e793fe5 100644 --- a/arch/x86/platform/intel-mid/mfld.c +++ b/arch/x86/platform/intel-mid/mfld.c @@ -49,8 +49,13 @@ static unsigned long __init mfld_calibrate_tsc(void) fast_calibrate = ratio * fsb; pr_debug("read penwell tsc %lu khz\n", fast_calibrate); lapic_timer_frequency = fsb * 1000 / HZ; - /* mark tsc clocksource as reliable */ - set_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC_RELIABLE); + + /* + * TSC on Intel Atom SoCs is reliable and of known frequency. + * See tsc_msr.c for details. + */ + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); return fast_calibrate; } diff --git a/arch/x86/platform/intel-mid/mrfld.c b/arch/x86/platform/intel-mid/mrfld.c index 59253db..e0607c7 100644 --- a/arch/x86/platform/intel-mid/mrfld.c +++ b/arch/x86/platform/intel-mid/mrfld.c @@ -78,8 +78,12 @@ static unsigned long __init tangier_calibrate_tsc(void) pr_debug("Setting lapic_timer_frequency = %d\n", lapic_timer_frequency); - /* mark tsc clocksource as reliable */ - set_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC_RELIABLE); + /* + * TSC on Intel Atom SoCs is reliable and of known frequency. + * See tsc_msr.c for details. + */ + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); return fast_calibrate; } -- 1.9.1