Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935507AbcKQAfE (ORCPT ); Wed, 16 Nov 2016 19:35:04 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:47271 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932212AbcKQAfD (ORCPT ); Wed, 16 Nov 2016 19:35:03 -0500 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Date: Wed, 16 Nov 2016 16:28:45 -0800 From: Stefan Agner To: Dong Aisheng , Ulf Hansson Cc: "Leonardo G. Veiga" , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, raul.munoz@toradex.com, leonardo.veiga@toradex.com, Haibo Chen Subject: Re: [PATCH] sdhci-esdhc-imx: fix bus-width for 1-bit operation. In-Reply-To: References: <1478015905-31262-1-git-send-email-leogveiga@gmail.com> Message-ID: <261f073f9b19e4a390a62ea111925b87@agner.ch> User-Agent: Roundcube Webmail/1.1.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3109 Lines: 84 On 2016-11-02 09:40, Stefan Agner wrote: > On 2016-11-02 01:42, Dong Aisheng wrote: >> Hi Leonardo, >> >> On Tue, Nov 1, 2016 at 11:58 PM, Leonardo G. Veiga wrote: >>> From: Leonardo Graboski Veiga >>> >>> The 1-bit operation mode, enabled by seeting the 'bus-width' property of >>> the device tree 'esdhc' node to <1>, not work while using SD card. >>> >>> The behavior is only noticed when only the data pin 0 is connected to the >>> hardware. A series of kernel errors are printed to the console, all of them >>> returning the following error message followed by some explanation: >>> mmcblk0: error -84 transferring data >>> >>> If four data lines are connected, it ignores the device-tree >>> property and works in 4-bit mode of operation without errors. The hardware >>> used for testing does not support 8-bit mode. >>> >>> Check the 'bus-width' property and if set to <1>, enable the >>> SDHCI_QUIRK_FORCE_1_BIT_DATA quirk. >>> >>> Signed-off-by: Leonardo Graboski Veiga >>> --- >>> drivers/mmc/host/sdhci-esdhc-imx.c | 4 ++++ >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c >>> index c9fbc4c3..88d7d22 100644 >>> --- a/drivers/mmc/host/sdhci-esdhc-imx.c >>> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c >>> @@ -1003,6 +1003,10 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, >>> host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; >>> } >>> >>> + if (!of_property_read_u32(np, "bus-width", &boarddata->max_bus_width) >>> + && boarddata->max_bus_width == 1) >>> + host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA; >>> + >> >> This looks like a common SDHCI driver issue that it assumes the default >> bus-width as 4 bit if no SDHCI_QUIRK_FORCE_1_BIT_DATA specified. >> if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) >> mmc->caps |= MMC_CAP_4_BIT_DATA; >> >> And I'm not sure Andrian or Ulf would like to see people keep using this quirk. >> IMHO we probably could totally remove it since bus-width already tells >> what the driver needs. > > Hm, I see what you are saying, the problem is that the core > (sdhci_setup_host) falls back to 4-bit if SDHCI_QUIRK_FORCE_1_BIT_DATA > is not set... Removing that should be fine for DT enabled SDHC drivers, > since mmc_of_parse sets MMC_CAP_4_BIT_DATA. But not sure about drivers > which parse dt on their own or still support platform data.... Those > might rely on MMC_CAP_4_BIT_DATA being set by default... Any thoughts on this? Btw, I just realized that this used to work in 4.1 because back then the device tree properties got parsed into struct esdhc_platform_data, which does set the 1-bit quirk.. So this can be seen as a regression... -- Stefan > > -- > Stefan > > > >> >> Andrian & Ulf, >> Comments? >> >>> /* call to generic mmc_of_parse to support additional capabilities */ >>> ret = mmc_of_parse(host->mmc); >>> if (ret) >>> -- >>> 2.7.4 >>> >> >> Regards >> Dong Aisheng