Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752534AbcKRFRr (ORCPT ); Fri, 18 Nov 2016 00:17:47 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:46773 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751320AbcKRFRn (ORCPT ); Fri, 18 Nov 2016 00:17:43 -0500 Message-ID: <1479446255.24375.3.camel@mtksdaap41> Subject: Re: [PATCH v5] drm/mediatek: fixed the calc method of data rate per lane From: CK Hu To: Daniel Kurtz CC: Jitao Shi , Philipp Zabel , Matthias Brugger , "Rob Herring" , Pawel Moll , Mark Rutland , Ian Campbell , "Kumar Gala" , Ajay Kumar , "Inki Dae" , Rahul Sharma , "Sean Paul" , Vincent Palatin , "Andy Yan" , Russell King , "open list:OPEN FIRMWARE AND..." , "linux-kernel@vger.kernel.org" , dri-devel , "linux-arm-kernel@lists.infradead.org" , "moderated list:ARM/Mediatek SoC support" , srv_heupstream , Sascha Hauer , Yingjoe Chen =?UTF-8?Q?=28=E9=99=B3=E8=8B=B1=E6=B4=B2=29?= , Eddie Huang =?UTF-8?Q?=28=E9=BB=83=E6=99=BA=E5=82=91=29?= , cawa cheng , Bibby Hsieh =?UTF-8?Q?=28=E8=AC=9D=E6=BF=9F=E9=81=A0=29?= , Date: Fri, 18 Nov 2016 13:17:35 +0800 In-Reply-To: References: <1479266454-31892-1-git-send-email-jitao.shi@mediatek.com> <1479361006.13083.7.camel@mtksdaap41> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1862 Lines: 65 Hi, Daniel: On Fri, 2016-11-18 at 11:22 +0800, Daniel Kurtz wrote: > Hi CK, > > On Thu, Nov 17, 2016 at 1:36 PM, CK Hu wrote: > > Hi, Jitao: > > > > > > On Wed, 2016-11-16 at 11:20 +0800, Jitao Shi wrote: > >> Tune dsi frame rate by pixel clock, dsi add some extra signal (i.e. > >> Tlpx, Ths-prepare, Ths-zero, Ths-trail,Ths-exit) when enter and exit LP > >> mode, those signals will cause h-time larger than normal and reduce FPS. > >> So need to multiply a coefficient to offset the extra signal's effect. > >> coefficient = ((htotal*bpp/lane_number)+Tlpx+Ths_prep+Ths_zero+ > >> Ths_trail+Ths_exit)/(htotal*bpp/lane_number) > >> > >> Signed-off-by: Jitao Shi > > > > It looks good to me. > > But this patch conflict with [1] which is one patch of MT2701 series. I > > want to apply MT2701 patches first, so please help to refine this patch > > based on MT2701 patches. > > I don't think the MT2701 DSI patches are quite ready yet (I just > reviewed the one below). > Can we instead land Jitao's small targeted change first, and then > rebase the MT2701 series on top. > > Thanks, > -Dan MT2701 series looks still have some defect to be fixed. Therefore, I would apply this patch first. Thanks for your help. Regards, CK > > > > [1] https://patchwork.kernel.org/patch/9422821/ > > > > Regards, > > CK > > > >> --- > >> Change since v4: > >> - tune the calc comment more clear. > >> - define the phy timings as constants. > >> > >> Chnage since v3: > >> - wrapp the commit msg. > >> - fix alignment of some lines. > >> > >> Change since v2: > >> - move phy timing back to dsi_phy_timconfig. > >> > >> Change since v1: > >> - phy_timing2 and phy_timing3 refer clock cycle time. > >> - define values of LPX HS_PRPR HS_ZERO HS_TRAIL TA_GO TA_SURE TA_GET DA_HS_EXIT. > >> --- > >> > >